Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-07-24
2003-01-07
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S356000, C257S357000, C257S360000, C257S365000, C257S368000, C257S510000, C257S524000
Reexamination Certificate
active
06504216
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an electrostatic discharge protective circuit. More particularly, the present invention relates to an electrostatic discharge protective circuit having a transistor with several isolation structures.
2. Description of the Related Art
Electrostatic discharge (ESD) is one of the major sources of integrated circuit (IC) damage in an IC fabrication process. This is especially true for fabrication of a deep sub-micron IC. In order to overcome the problems caused by static electricity, an ESD protective circuit is incorporated on the input/output (I/O) pads of a complementary metal-oxide-semiconductor (CMOS) IC through an on-chip method.
FIG.
1
A and
FIG. 1B
are schematic circuit diagrams of conventional ESD protective circuits. As shown in
FIG. 1A
, in order to protect the internal circuit
10
, the internal circuit
10
is electrically coupled to the pads (not shown) through an NMOS. The ESD current imported through an input port INP is discharged through the NMOS transistor NI to a ground V
SS
.
FIG. 1B
is a schematic circuit diagram of another conventional ESD protective circuit. As shown in
FIG. 1B
, in order to protect the internal circuit
10
, the ESD current can be discharged not only through an NMOS transistor N
1
to the ground V
SS
but also through a PMOS transistor PI to a voltage source V
DD
.
FIG. IC is a schematic, top view of a transistor in a conventional ESD protective circuit. A transistor
106
mainly comprises a gate electrode
100
, a drain region
102
and a source region
104
, wherein the drain region
102
and the source region
104
are respectively formed at each side of the gate electrode
100
. There are several contacts
108
respectively formed on the gate electrode
100
, the drain region
102
and the source region
104
. The contacts
108
are used as conductive media to respectively connect the external pads (not shown), the ground Vss (as shown in
FIGS. 1A and 1B
) and the voltage source V
DD
(as shown in
FIG. 1B
) to the gate electrode
100
, the drain region
102
and the source region
104
. As a current is induced by electrostatic discharge, the current flows to the drain region
102
via the contacts
108
. The current then passes through channels (not shown) controlled by the gate electrode
100
of the transistor
106
and reaches to the source region
104
. Thereafter, the current flows to the ground (not shown) or to a voltage source line (not shown) via the contacts
108
on the source region
104
.
However, the transistor
106
mentioned above has several disadvantages. When the gate electrode
100
is nonuniform, some of the channels may open relatively early. Moreover, when some of the channels have defects, the current induced by the electrostatic discharge will excessively focus at those channels or at the defects. Therefore, the massive current passes through only a portion of the transistor and the temperature of that portion of the transistor is high. Hence, the IC is damaged. Additionally, since the current does not flow through other channels, the efficiency of the ESD protective circuit is poor.
SUMMARY OF THE INVENTION
The invention provides an electrostatic discharge protective circuit. By using the invention, the current induced by the electrostatic discharge can uniformly flow from the drain to the source. The damage of the IC caused by excessively focused current can be avoided. Additionally, the effect of the electrostatic discharge protective circuit can be greatly improved.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides an electrostatic discharge protective circuit. The electrostatic discharge protective circuit includes a gate electrode. A drain is formed at one side of the gate electrode. A source is formed at another side of the gate electrode, wherein the gate electrode, the drain and the source together form a transistor. A plurality of isolation structures penetrates through the gate electrode and respectively isolates the drain and the source into a plurality of drain regions and source regions. A plurality of contacts is respectively formed on the gate electrode, the drain regions and the source regions, wherein each drain region and each source region respectively has at least one contact.
The invention provides an electrostatic discharge protective circuit. The electrostatic discharge protective circuit includes a gate electrode. A drain is formed at one side of the gate electrode. A source is formed on another side of the gate electrode, wherein the gate electrode, the drain and the source together form a transistor. A plurality of isolation structures penetrates through the gate electrode, isolates the source into a plurality of source regions and extends into a portion of the drain from both sides of the drain. A plurality of contacts is respectively formed on the gate electrode, the drain regions and the source regions, wherein each drain region and each source region respectively has at least one contact. Since the isolation structures electrically isolate the drain regions from each other, the currents cannot flow to each other between every drain region. Thereafter, the currents flow to each source region from the respective drain regions. Hence, the current induced by the electrostatic discharge does not excessively focus at some contacts in the source. Because the current uniformly flows through the drain regions, the local high temperature effect of the transistor and the damage to the IC can be avoided. Furthermore, since the current flows from the drain to the source through most of the channels, the effect of the ESD protective circuit can be greatly enhanced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5914517 (1999-06-01), Konogi
patent: 6054736 (2000-04-01), Shigehara et al.
patent: 6064095 (2000-05-01), Fu
patent: 0 747 966 (1996-05-01), None
patent: 56-27969 (1981-03-01), None
patent: 402036564 (1990-02-01), None
Hsu Chen-Chung
Tang Tien-Hao
Flynn Nathan J.
Sefer Ahmed N.
United Microelectronics Corp.
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