Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-11-28
2003-01-14
Elms, Richard (Department: 2824)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S316000, C257S330000, C257S331000, C257S341000
Reexamination Certificate
active
06507073
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention:
The present invention relates generally to semiconductor devices including but not limited to metal oxide semiconductor field effect transistors (MOSFETs). More particularly, but not exclusively, this invention relates to MOS type semiconductor devices excellent in withstanding or breakdown voltage performance and a method for manufacturing the same.
2. Description of Related Art:
One known MOSFET manufacturing method is shown in
FIGS. 2A-2E
. As shown in
FIG. 2A
, a silicon oxide film
22
is arranged on a silicon substrate
21
for later use as a gate oxide layer. Then, a polysilicon layer
23
is arranged on the oxide film. Next, a patterned resist layer
24
for use during formation of a gate electrode pattern is formed on a part of the polysilicon layer
23
which will later become a gate electrode.
Thereafter, as shown in
FIG. 2B
, the polysilicon layer
23
is etched with the resist layer
24
being used as a mask therefor, thereby forming a polysilicon gate electrode
23
′.
Next, as shown in
FIG. 2C
, low-concentration ion implantation
27
of a selected impurity, such as boron or phosphorus, is performed to thereby obtain lightly-doped source/drain regions
29
.
Thereafter, as shown in
FIG. 2D
, additional or “extra” oxidation, called low-temperature oxidation (LTO), is carried out for recovery of any possible etching damages which arose during formation of the gate electrode
23
′ and damages resulting from the ion implantation
27
. The ion implantation may alternatively be done after the LTO. Through this LTO, exposed portions of the oxide film
22
are forced to additionally grow to thereby form a thickened oxide film
22
′ with an increased thickness--- to obtain what is called an oxide thick-film while also permitting formation of an oxide film
25
at exposed part of the gate electrode
23
′. On the contrary, the gate oxide layer underlying the gate electrode
23
′ does not grow and thus retains the gate oxide layer
22
as originally formed. However, the oxide film immediately beneath the terminate end portions of the gate electrode
23
′ results in formation of a slightly additionally grown boundary oxide layer in the form that it “bites” into an underpart of the gate electrode
23
′. As a result, distortion
26
can take place at or near the end portions of the gate electrode
23
′ upon receipt of influence from the boundary oxide layer of the underlying oxide film
22
′ that has been grown slightly. This distortion
26
at the ends of gate electrode
23
′ causes breakdown voltage defects of MOSFET products.
As shown in
FIG. 2E
, after having formed lightly-doped drain (LDD) side spacers
28
, high-concentration ion implantation is performed to thereby manufacture a MOSFET product.
As stated above, the MOSFET manufactured by the above-described prior art method is faced with a problem that the distortion
26
can occur at ends of the gate electrode
23
, due to additional oxidation growth at the boundary part of the gate oxide film
22
′ at the additional oxidation step of
FIG. 2D
, which can cause breakdown voltage defects. This is a serious bar to successful manufacture of MOS type semiconductor devices, especially those MOSFETs with middle-class breakdown voltage performance ranging from ten volts up to several tens of volts or ones with high-class breakdown voltage performance of a hundred of volt or higher.
Another problem associated with the above-described prior art manufacturing method is that it requires a specific process step of forming the LDD side spacers
28
prior to the high-concentration ion implantation, which would result in an increase in the number of process steps involved.
A further problem faced with the above-described prior art manufacturing method is that the setting of process conditions makes it difficult to employ desired high-melting-point metals, so-called refractory metals, other than polysilicon-this is the currently “standard” material for use as the gate electrode-including molybdenum and tungsten for example.
SUMMARY OF THE INVENTION
It is therefore one primary object of the present invention to provide a MOS type semiconductor device with a gate oxide layer formed of a silicon oxide film capable of offering enhanced breakdown voltage performance at terminate ends of a gate electrode.
It is another object of this invention to provide a method for manufacturing a MOS semiconductor device with stable and excellent breakdown voltage performance through relaxation of distortion otherwise occurring due to oxidation growth of a gate oxide layer.
It is yet another object of the invention to provide a method of manufacturing a MOS semiconductor device having similar effects while avoiding the necessity of forming LDD side spacers thus reducing or simplifying the overall fabrication procedure.
It is still another object of the invention to provide a MOS semiconductor device manufacturing method which permits the use of high-melting-point metals, including but not limited to molybdenum or tungsten, other than polysilicon as currently widely employed as the gate electrode material.
To solve the above-noted problems, the manufacturing method incorporating the principles of the invention is specifically arranged to fabricate a gate electrode after completion of a process step of additionally oxidizing an oxide film to ensure that the gate electrode is no longer directly affectable from any oxide film under additional oxidation growth, which in turn makes it possible to eliminate distortion at terminate end portions of the gate electrode.
More specifically, the method includes the steps of forming on a semiconductive substrate an oxide film for use as a gate oxide layer, disposing a shield body at a gate electrode formation location on the oxide film, letting the oxide film additionally grow through oxidation, removing the shield body after such additional growth, and forming a gate electrode at a specified part from which the shield body has been removed away.
Another feature unique to the MOS semiconductor device manufacturing method in accordance with the invention is that it permits the use of selected materials other than polysilicon, such as for example high-melting-point molybdenum or tungsten, for fabrication of the intended gate electrode after additional growth of the oxide film.
A further feature of the MOS semiconductor device manufacturing method in accordance with the invention is that low-concentration ion implantation is performed upwardly from the shield body and oxide film, high-concentration ion implantation is done by use of contact holes as defined in an interlayer dielectric layer that covers both the gate electrode and the oxide film whereby the intended MOS semiconductor device with the same effects is obtainable while omitting the step of forming LDD side spacers.
In accordance with the invention, a MOS semiconductor device is also provided wherein the terminate ends of a gate electrode are free from any distortion otherwise occurring due to additional oxidation growth of an oxide film while these gate ends are placed at locations overlying the thickened oxide film as formed through such additional growth to have an increased thickness. Accordingly, the gate electrode may stably offer excellent breakdown voltage performance, resulting in achievement of the MOS semiconductor device having stable breakdown voltage performance.
REFERENCES:
patent: 5036375 (1991-07-01), Mitchell
patent: 5373178 (1994-12-01), Motoyoshi et al.
patent: 5407841 (1995-04-01), Liao et al.
patent: 5747851 (1998-05-01), Tomatsu et al.
patent: 6127696 (2000-10-01), Sery et al.
Elms Richard
Jordan and Hamburg LLP
Menz Doug
Nippon Precision Circuits Inc.
LandOfFree
MOS semiconductor device with breakdown voltage performance... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with MOS semiconductor device with breakdown voltage performance..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and MOS semiconductor device with breakdown voltage performance... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3003673