Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-03-15
2003-07-15
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S059000, C257S071000, C257S072000, C257S296000
Reexamination Certificate
active
06593626
ABSTRACT:
BACKGROUND OF THE INVENTION
1.Field of Invention
The present invention relates to an electro-optical device consisting of a substrate provided with a semiconductor layer, to a method for making the electro-optical device, and to an electronic apparatus. In particular, the present invention relates to an electro-optical device in which a channel region of the semiconductor layer is connected to a capacitor line, to a method for making the electro-optical device, and to an electronic apparatus.
2.Description of Related Art
A silicon-on-insulator (SOI) technology, which includes the formation of a semiconductor layer composed of single-crystal silicon layer on an insulating substrate and of semiconductor devices such as transistor elements on the semiconductor layer, has advantages such as high-speed operation, low electrical power consumption and high-density integration of the elements. The SOI technology is applicable to electro-optical devices, for example, switching elements of a TFT array in a liquid crystal device.
In typical bulk semiconductor components, channel regions of transistor elements are maintained at a given potential by an underlying substrate. Thus, a parasitic bipolar effect generated by a change in potential in the channel region will not cause deterioration of electrical characteristics, such as a withstanding voltage.
SUMMARY OF THE INVENTION
In electro-optical devices such as liquid crystal devices, for example, transistor elements constituting switching elements in a TFT array may be completely isolated by an oxide insulating film. Hence, the channel regions in the transistor elements cannot be fixed at a given potential, and the channel regions are in an electrically floating state. In particular, when the transistor elements have a structure consisting of a single-crystal silicon layer, mobility of carriers moving in the channel may become high. Thus, collision of carriers accelerated by an electric field in the vicinity of the drain region with the crystal lattice may cause a phenomenon called impact ionization, and, for example, holes may be generated and accumulated in the bottom of the channel in an N-channel TFT. When charge is accumulated in the channel, the NPN structure of the TFT (in the case of the N-channel type) operates as an apparent bipolar element, resulting in deterioration of electrical characteristics, such as the source/drain withstanding voltage, of the element due to an extraordinary current. A series of phenomena caused by electrical floating of the channel regions are called substrate stray effects.
The present invention provides an electro-optical device which prevents deterioration of source/drain withstanding voltage by the substrate stray effects of transistor elements composed of a single-crystal silicon layer covered with an insulating film, and which can stabilize and improve electrical characteristics of the elements, a method for making the electro-optical device, and an electronic apparatus.
An electro-optical device in accordance with the present invention may consist of, on a substrate, a plurality of scanning lines, a plurality of data lines crossing the plurality of scanning lines, transistors connected to each of the scanning lines and to each of the data lines, pixel electrodes connected to the transistors, and storage capacitors, wherein an extending portion of a semiconductor layer functioning as a channel region of the transistor is connected to a capacitor line functioning as an electrode of the storage capacitor.
According to such a configuration in the present invention, the channel region of the semiconductor layer composed of a single-crystal silicon layer is connected to the capacitor line as an electrode of a storage capacitor, the channel region is maintained at a potential of the capacitor line, an extraordinary current in the transistor element is avoided, and electrical characteristics of the element are stabilized.
In the electro-optical device of the present invention, the extending portion and the capacitor line may be connected to each other by a connecting line via a first contact hole formed above the extending portion and a second contact hole formed on the capacitor line, and the scanning line and the capacitor line may lie in the same layer and have detour sections formed so as to detour around the first contact hole.
According to such a configuration of the present invention, the channel region of the semiconductor layer can be connected to the capacitor line while effectively using limited spaces. Since the connecting line and the contact holes can be simultaneously formed together with the data line, these can be formed using conventional production processes. Thus, in the electro-optical device of the present invention, the connecting line and the data line are preferably formed on the same layer.
In the electro-optical device of the present invention, the thickness of the semiconductor layer may lie in a range of 100 to 180 nm.
According to such a configuration of the present invention, the thickness of the semiconductor layer is greater than 100 nm. Thus, when the contact hole for connecting the pixel electrode to the drain region of the semiconductor layer, the contact hole will not pass through the semiconductor layer. Since the thickness of the semiconductor layer is less than 180 nm, the bumps of the device substrate due to the thickness of the semiconductor layer can be suppressed as much as possible. As a result, disclination when the liquid crystal is aligned can be suppressed and the display quality can be maintained at a satisfactory level.
In the electro-optical device of the present invention, a gate insulating film having a thickness of 450 mn to 650 nm may be inserted between the channel region of the semiconductor layer and a gate electrode region of the scanning line.
Since the thickness of the gate insulating film is greater than 450 nm according to such a configuration of the present invention, the liquid crystal can be driven by a required electrical power voltage without dielectric breakdown. Since the thickness of the gate insulating film is less than 650 nm, the gate capacitance can be increased so that the operating speed of the TFT elements, which is essential for driving the liquid crystal display device, can be ensured.
In the electro-optical device of the present invention, the impurity concentration at the edge of the channel region of the semiconductor layer may be higher than the impurity concentration of the other parts of the channel region.
Since the impurity concentration at the edge of the channel region of the semiconductor layer is higher than the impurity concentration of the other parts of the channel region according to such a configuration of the present invention, the apparent threshold voltage in this region is high. Thus, a leakage current can be prevented when the electric field from the gate electrode is concentrated in the edge of the channel region of the semiconductor layer.
In the electro-optical device, the thickness of the scanning line may lie in a range of 350 nm to 700 nm.
Since the thickness of the scanning line is greater than 350 nm according to such a configuration of the present invention, the wiring resistance can be reduced and a decreased in the writing rate of signals into pixels due to wiring delay can be sufficiently suppressed. Since the thickness of the scanning line is less than 550 nm, the bumps of the device substrate due to the thickness of the scanning line can be suppressed as much as possible. As a result, disclination when the liquid crystal is aligned can be suppressed and display quality can be maintained at a satisfactory level.
In the electro-optical device, the scanning line may consist of a polysilicon layer or at least two layers of a polysilicon and a conductive metal layer. According to such a configuration of the present invention, the conductivity can be enhanced; hence, a decrease in the writing rate of signals into pixels due to wiring delay can be sufficiently suppressed. In particular, the cond
Hirabayashi Yukiya
Katayama Shigenori
Yasukawa Masahiro
Ngo Ngan V.
Oliff & Berridge PLC.
Seiko Epson Corporation
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