Pattern forming method

Details Pattern forming method Pattern forming method

2001-04-03

2002-10-22

Nelms, David (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

Reexamination Certificate

active

06468895

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a pattern forming method of forming a micropattern, e.g., a relatively thick interconnection with a film thickness of about 10 &mgr;m, which is used in a semiconductor device or micromachine device.
In a semiconductor device, to integrate elements within a small area with a higher degree of integration, elements and interconnections must be formed with smaller sizes, and a multilayered structure of interconnections must be used. In a micromachine device as well, a multilayered structure is used to realize a three-dimensional structure. In these multilayered structures, all the layers are not uniform-thick flat layers, but some layers have complicated three-dimensional shapes with various patterns. For example, in an LSI, a plurality of elements formed on a silicon substrate are connected to each other with a plurality of interconnection layers formed in a multilayered structure on the elements, thereby forming a circuit. In such a multilayered interconnection structure, the three-dimensional shape of the interconnection layer is absorbed by an interlayer dielectric film to obtain a flat state, and another interconnection layer is formed on it.
Among techniques of forming flat an interlayer dielectric film and the like on a three-dimensional shape, according to one technique, an interlayer dielectric film is formed on a three-dimensional shape, and after that the projecting portions of the surface of the interlayer dielectric film in which the three-dimensional shape is reflected is selectively removed, thereby planarizing the interlayer dielectric film. According to another technique called damascene, a trench is formed in a flat interlayer dielectric film, and a material for forming a pattern such as an interconnection fills the trench to form a pattern layer such as an interconnection layer. When the interconnection layer is formed, it is already flat. In damascene, chemical mechanical polishing (CMP) is often used in order to achieve a state wherein an interconnection electrode fills a trench.
Formation of a multilayered interconnection structure according to damascene will be briefly described. As shown in
FIG. 3A
, an insulating film
302
is formed on a substrate
301
, and trenches
303
are formed at predetermined portions of the insulating film
302
so as not to extend through the insulating film
302
.
As shown in
FIG. 3B
, a plating seed layer
304
is formed on the surface of the insulating film
302
including the interiors of the trenches
303
. After that, as shown in
FIG. 3C
, the surface of the insulating film
302
including the interiors of the trenches
303
is plated, thereby forming an interconnection metal film
305
through the seed layer
304
.
Finally, as shown in
FIG. 3D
, the interconnection metal film
305
is polished by CMP until the surface of the insulating film
302
is exposed, while leaving the interconnection metal film
305
only in the trenches
303
, thereby forming interconnection layers
306
. In CMP, if the metal film is selectively polished with respect to the insulating film, polishing can be stopped when the surface of the insulating film
302
is exposed. In damascene, when the interconnection layers are formed, the surfaces of the interconnection layers and the upper surface of the insulating film have been planarized and flush with each other. Therefore, the surface of the insulating film need not be planarized. In formation of a multilayered interconnection structure in accordance with damascene, “formation of an insulating film—formation of trenches—formation of interconnection layers” is repeated a predetermined number of times.
Another conventionally known method will be described. As shown in
FIG. 4A
, an interlayer film
402
is formed on a substrate
401
, and trenches
403
a
and
403
b
with predetermined shapes are formed at predetermined portions of the interlayer film
402
.
As shown in
FIG. 4B
, a polyimide resin film
404
is formed on the interlayer film
402
including the interiors of the trenches
403
a
and
403
b,
so the trenches
403
a
and
403
b
are filled with polyimide resin.
Finally, as shown in
FIG. 4C
, the polyimide resin film
404
is polished by CMP until the surface of the interlayer film
402
is exposed, while leaving the polyimide resin only in the trenches
403
a
and
403
b,
thereby forming patterns
404
a
and
404
b.
In CMP, if the polyimide resin is selectively polished with respect to the material of the interlayer film
402
, polishing can be stopped when the surface of the interlayer film
402
is exposed.
CMP used in damascene described above is a very effective means if a sufficiently high polishing selectivity can be maintained between a film to be polished and a film not to be polished. Even if a sufficiently high polishing selectivity cannot be maintained, when the film not to be polished is as thin as about 1 &mgr;m, CMP is still effective as a planarizing means.
When a polishing target for CMP is a thick film with a thickness of about 10 &mgr;m as in formation of a micromachine, it is very difficult to determine the end of polishing, and the polishing rate must be inevitably reduced, leading to an increase in polishing time.
When the film thickness increases to as large as 10 &mgr;m, variations in thickness increase. When this film is polished by CMP, even if polishing is ended at a certain region, a film to be polished still remains at another region, making it very difficult to determine the end point. For this reason, conventionally, coarse polishing is performed first, and then finish polishing is performed by decreasing the polishing rate very low so the polishing selectivity is increased. In this manner, when a film with a thickness of about 10 &mgr;m is to be planarized by polishing in accordance with CMP, it conventionally takes a very long time, for example, to form a micromachine by using damascene.
SUMMARY OF THE INVENTION
It is a principal object of the present invention to provide a pattern forming method which can planarize a comparatively thick film with a thickness of about 10 &mgr;m within a shorter period of time than in the prior art.
In order to achieve the above object, according to the basic idea of the present invention, a portion to be polished by CMP is made present only near a desired pattern.
According to the present invention, there is provided a pattern forming method comprising the steps of forming a recess in a flat base, arranging a pattern material only in and around the recess so as to project upward from a surface of the base and to be larger than an opening of the recess, and removing the pattern material projecting from the surface of the base by chemical mechanical polishing (CMP) so as to be flush with an upper surface of the base.


REFERENCES:
patent: 6162728 (2000-12-01), Tsao et al.
patent: 6245676 (2001-06-01), Ueno
H. Ishii et al., “A New Fabrication Process for Low-loss Millimeter-Wave Transmission Lines on Silicon,” Jpn. J.Appl. Phys. vol. 39 Part 1, No. 4B, pp. 1982-1986, Apr. 2000.
A. Krishnan et al., “Copper Metallization For VLSI Applications,” Jun. 9-10, 1992 VMIC Conference.

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