Method of fabricating an imager array

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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Details

C438S149000, C438S151000, C438S152000, C438S153000, C438S154000

Reexamination Certificate

active

06465286

ABSTRACT:

BACKGROUND OF INVENTION
The invention relates to a method of fabricating imager arrays in which charge retention effects are minimized, and specifically to a reduced mask process for producing thin film transistor (TFT) addressed imagers, in which charge trapping in the TFTs is reduced.
Solid state imaging devices are used in medical diagnostics, for example, as x-ray imagers, and for other light imaging uses. Such imaging devices typically comprise arrays of photosensor elements with associated switching elements, and address (scan) and read out (data) lines. Typically, the photosensor elements are photodiodes, and the switching elements are thin film field effect transistors (TFTs or FETs). The photosensor and associated switching device may be referred to as a pixel.
Imaging devices of this type may be produced by a fabrication technique or sequence known as a reduced mask set process, one example of which is disclosed in U.S. Pat. No. 5,480,810.
The photosensor array of the imaging device is designed to generate an electrical signal corresponding to an incident optical photon flux, the photons having typically been generated, in the case of medical x-ray imaging, by radiation absorbed in a scintillator receiving incident radiation passing from a source through an object to be imaged. The layout and construction of the photosensor array, including the photodiodes or pixels, address lines, and associated TFTs, enables the device to individually address each photosensor, so that the charge developed by each photosensor during a cycle of exposure to incident radiation can be selectively read.
While the performance of the imager is dependent on many factors, one important image quality parameter involves control of charge retention offsets, which cause variability in readings from one pixel to the next. In the TFT-addressed imaging devices, charge retention involves charge trapping in the individual addressing TFTs. Such variation in readings from respective TFTs contributes to read out noise and further requires that read out circuits be able to handle a wider range of signal, thereby limiting image quality.
In the technique referred to above as a reduced mask set process, the photodiodes are fabricated or formed prior to the formation of the associated TFTs. In the reduced mask set processes previously proposed, control of charge retention continues to be a factor. Variations in the charge trapping from pixel to pixel in an imager fabricated by prior reduced mask set processes can be in excess of 50 fentocoulomb, which generally is a level of variation higher than desirable for many types of imaging.
It is therefore desirable to develop a reduced mask set process that yields an imager in which charge retention and charge trapping in the TFTs are reduced and the charge retention offsets are rendered more uniform.
SUMMARY OF THE INVENTION
In an exemplary embodiment of the invention, a method for fabricating an imager array having a plurality of pixels, each pixel having a thin film transistor (TFT) switching device coupled to a respective photosensor, includes the steps of 1) forming a gate electrode and a photosensor bottom electrode on a substrate; 2) forming a photosensor body on at least a portion of the photosensor bottom electrode; 3) depositing a common dielectric layer over the gate electrode and over the photosensor body; 4) forming a TFT body on the common dielectric layer such that the TFT body is disposed above and in a spaced relationship with the gate electrode; 5) depositing a source/drain metal conductive layer over the TFT body and over exposed portions of the common dielectric layer; 6) removing portions of the source/drain metal conductive layer in accordance with a predetermined pattern so as to expose a portion of an upper surface of the TFT body, and so as to leave at least one region of source/drain metal remaining disposed on the common dielectric layer above the photosensor body; 7) etching the exposed portion of the TFT body to form a back channel region in the TFT body, the back channel region being disposed over the gate electrode; and 8) removing the at least one region of the source/drain metal disposed on the common dielectric layer above the photosensor body.


REFERENCES:
patent: 5075244 (1991-12-01), Sakai et al.
patent: 5187602 (1993-02-01), Ikeda et al.
patent: 5281546 (1994-01-01), Possin et al.
patent: 5362660 (1994-11-01), Kwasnick et al.
patent: 5399884 (1995-03-01), Wei et al.
patent: 5435608 (1995-07-01), Wei et al.
patent: 5480810 (1996-01-01), Wei et al.
patent: 5516712 (1996-05-01), Wei et al.
patent: 5663577 (1997-09-01), Kwasnick et al.
patent: 5980763 (1999-11-01), Young
patent: 6137552 (2000-10-01), Yanai
patent: 06029510 (1994-02-01), None
patent: 2000208750 (2000-07-01), None

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