Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure
Reexamination Certificate
2001-01-25
2002-10-15
Whitehead, Jr., Carl (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
C257S047000, C257S197000, C257S273000
Reexamination Certificate
active
06465870
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a bipolar transistor, and more particularly to a silicon germanium (SiGe) bipolar transistor which includes an integrated resistor element for providing electrostatic discharge (ESD) robustness in radio frequency (RF) applications.
BACKGROUND OF THE INVENTION
Significant growth in both high-frequency wired and wireless markets has introduced new opportunities where compound semiconductors have unique advantages over bulk complementary metal oxide semiconductor (CMOS) technology. With the rapid advancement of epitaxial-layer pseudomorphic SiGe deposition processes, epitaxial-base SiGe heterojunction bipolar transistors have been integrated with mainstream advanced CMOS development for wide market acceptance, providing the advantages of SiGe technology for analog and RF circuitry while maintaining the full utilization of the advanced CMOS technology base for digital logic circuitry.
SiGe heterojunction bipolar transistor devices are replacing silicon bipolar junction devices as the primary element in all analog applications. With the increased volume and growth in the applications that use SiGe heterojunction bipolar transistors for external circuitry, electrostatic discharge (ESD) robustness is needed. This is especially the case in RF applications such as in mobile phone use, where high-transistor speeds and high-frequency responses are needed. As the frequency response of such devices increases, the loading effect on the transistor, which may lead to excessive noise and distortion, also increases.
To date, no SiGe bipolar transistors for use in RF applications and other applications which require high-operating speeds and high-frequencies have been developed in which substantial ESD robustness is provided. In view of this, there is a need to develop a SiGe bipolar transistor for use in applications in which substantial ESD robustness is provided.
SUMMARY OF THE INVENTION
The present invention uses some of the intrinsic base regions of the bipolar transistor as series base resistor ballasting elements, where the extrinsic base region is extended and dopants are blocked using an emitter mask level, and by providing a heavily-doped facet region which adjoins the SiGe epitaxially grown layer so as to avoid defect leakage into the intrinsic base region.
The term “facet region” is used herein to denote the boundary region wherein the SiGe layer changes from polycrystalline to single crystal. Typically, in the present invention, the polycrystalline SiGe is located above the isolation trenches, whereas the single crystal SiGe region lays above the epitaxial base collector region. In accordance with the above discussion, the facet region is located in regions next to the isolation regions.
In this invention, the term “SiGe” transistor also includes SiGe layers that include carbon, C, which is typically present inside the base region forming a SiGeC compound.
Specifically, in accordance with one aspect of the present invention, a SiGe bipolar transistor is provided which comprises:
a substrate of a first conductivity type;
a doped subcollector region of a second conductivity type formed on said substrate, said doped subcollector region including an epitaxial collector region which is defined between isolation regions;
a first film comprising silicon and germanium formed on said doped subcollector region, said first film including a single crystal SiGe intrinsic base region and extrinsic SiGe polysilicon base regions of said first conductivity type abutting said intrinsic base region;
a second film comprising an emitter of the second conductivity type contained over said intrinsic base region formed by an emitter window mask and a second region formed outside of the emitter;
a first doped region of the first conductivity type formed at a facet point between said intrinsic base region and one of said extrinsic base regions;
a second doped region of said first conductivity type contained at the outermost extrinsic base regions, said second doped region forming a base input; and
a resistor formed in SiGe polysilicon base regions between said first and second doped regions, said resistor including a SiGe film.
The bipolar transistor of the present invention may also include a collector contact which is in contact with an exposed portion of said subcollector region, a base contact which is in contact with said input region and a emitter contact which is in contact with said emitter.
In accordance with another aspect of the present invention, a method of forming the above mentioned SiGe bipolar transistor is also provided. Specifically, the inventive method comprises the steps of:
(a) forming a SiGe-containing film on a surface of a structure which includes a subcollector region, said SiGe-containing film being formed by a low temperature deposition process;
(b) forming an insulator film on said SiGe-containing film;
(c) etching portions of said insulator film so as to expose portions of said SiGe-containing layer, while leaving other portions of said insulator film unetched;
(d) providing an emitter window opening in at least one of the unetched regions;
(e) forming an intrinsic polysilicon layer over the etched and unetched regions;
(f) patterning said intrinsic polysilicon layer using an emitter window etch mask so as to define spaces in said intrinsic polysilicon layer for forming extrinsic base regions;
(g) implanting a dopant in said spaces using said emitter window emitter etch mask as an implantation mask so as to form said extrinsic base regions in said SiGe-containing film; and
(h) removing said emitter window mask.
In one embodiment of the present invention, silicide regions are formed on the extrinsic base regions prior to removing the emitter window mask. This is achieved utilizing conventional silicidation processes well known in the art, i.e., depositing a refractory metal layer on said extrinsic base regions; annealing the refractory metal layer so as to form a metallic silicide on said extrinsic base regions; and removing any metal not silicided in the annealing step. Alternatively, it is possible to block the facet region so that no silicide is formed therein.
In another embodiment of the present invention, contact regions to the collector, base and emitter are formed after the emitter window mask has been removed from the structure. The contact regions are formed by first depositing a dielectric material; providing contact openings in the dielectric material so as to expose the collector, base and emiter regions; depositing a conductive material in said contact openings, and, if needed, planarizing the structure.
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Voldman, S., et al., “Electrostatic Discharge and High Current Pulse Characterization of Epitaxial-Base silicon-Germanium Heterojunction Bipolar Transistors”, 2000 IEEE International Reliability Physics Symposium Proceedings, 38th Annual (Cat. No. 00CH37059), pp. 310-316 (2000).
Chadurjian Mark F.
Jr. Carl Whitehead
Lewis Monica
Scully Scott Murphy & Presser
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