Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-05-29
2002-10-22
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S349000, C257S373000, C438S479000, C438S517000
Reexamination Certificate
active
06469349
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor integrated element having a MOS transistor, structure, and more particularly to a SOI type MOS element and its manufacturing method.
2. Description of the Related Art
Along with enhancement of performance of semiconductor elements, nowadays, all electronic appliances and electronic systems are advanced rapidly. In particular, in the promoting trend of lower power consumption, higher speed, and smaller size of semiconductor elements, personal digital assistants represented by electronic pocketbooks and cellular phones are spreading fast and widely.
In the field of personal computers, too, the technical level is now nearly as high as allowing mobile use. Further, it may be soon possible in other electronic appliances hitherto regarded to be impossible in portable use. In the light of such market trend, it is today an indispensable subject to present semiconductor elements of high performance to the market.
At the present, the SOI (silicon on insulator) technology is proposed as a promising technology for achieving lower power consumption, higher speed, and smaller size, and it is intensively studied by semiconductor manufacturers.
According to this technology, an insulating layer composed of a silicon oxide (SiO) film is formed in the bulk near a semiconductor surface, and a semiconductor element is formed only on a thin surface layer of the semiconductor substrate being left over, and, therefore, the junction capacity of semiconductor element can be decreased and it is widely known that the power consumption and decline of speed can be suppressed.
FIG. 6
is a sectional view of an N channel MOS (metal oxide semiconductor) transistor
1
manufactured by the conventional SOI technology, and
FIG. 7
is a plan of the N channel MOS transistor
1
manufactured by the conventional SOI technology.
As shown in FIG.
6
and
FIG. 7
, the N channel MOS transistor
1
comprises a P type silicon substrate
10
, a P well layer
12
, an oxide film
14
formed in silicon bulk near the surface of the silicon substrate
10
, a filed oxide film
16
, a gate oxide film
22
, a source and drain N+ diffusion layer
26
, a gate electrode
28
, electrode contact holes
32
, an aluminum electrode
34
, a PSG film
40
, and a passivation (PV) film
42
.
In the semiconductor element manufactured by the conventional SOI technology, the oxide film
14
is formed in the silicon, and the transistor structure is formed only near the surface of the silicon substrate
10
, and thereby the junction capacity is decreased and a higher performance is achieved.
Recently, methods commercially developed for forming the oxide film
14
include the SIMOX (separation by implanted oxygen) method and the adhesion SOI method.,
In the former method, oxygen ions are implanted at high dose in the bulk region near the surface of silicon substrate, and then the oxide film is formed and heat treatment is required for recovery of crystalinity.
In particular, to form a perfect buried oxide film
14
in the bulk, the oxygen ion implantation is performed at high energy and super-high dose of, for example, 200 keV, 2×10
18
/cm
2
. Further, in order to form the buried oxide film
14
in the silicon, it requires heat treatment at high temperature and for a long period of, for example, over 1300 degrees and 8 hours or more.
In the latter method, a heat oxide film is formed on one or both of two substrates, and they are adhered together, and one of them is polished to form into a thin film to compose a SOI structure. Therefore, as compared with the ordinary silicon substrate, the manufacturing process is complicated.
Thus, the conventional SOI technology involves the following problems. First, crystal defects occurring when forming the oxide film
14
have adverse effects on reliability, yield, quality and characteristics of the produced MOS device, and the original performance of the element cannot be exhibited sufficiently. At the present, it is difficult to obtain stable crystal quality.
Second, in the SIMOX method which requires oxygen ion implantation equipment of high dose and heat treatment equipment of high temperature at the time of manufacture, development of such equipment suited to mass production is indispensable.
Third, the SOI substrates are generally supplied by silicon wafer makers, but the cost is high as compared with other silicon substrates because of such special technology required as mentioned above.
Fourth, the structure itself of the conventional SOI type MOS element is a simple structure having a general structure of a conventional MOS transistor formed on the SOI substrate, and hence the performance of the element is not sufficiently improved, and further structural ideas and improvement of characteristics are demanded.
The invention is devised in the light of these problems of the conventional SOI type MOS element and its manufacturing method, and it is hence an object thereof to present a SOI type MOS element which is excellent in yield, performance and characteristics, easy in manufacturing method, and low in cost, and a method of manufacturing the same.
SUMMARY OF THE INVENTION
To solve the problems, the invention presents a SOI type MOS element having a MOS transistor structure comprising gate, source and drain electrodes buried in first, second and third trench holes formed in a semiconductor substrate, a thick SiO
2
film in a fourth trench hole formed in the semiconductor substrate for surrounding the transistor, and a channel region formed in the semiconductor substrate along the first trench hole.
Further, the SOI type MOS element has an intermediate insulating layer, contact holes, a wiring electrode, and a passivation layer.
The SOI type MOS element is manufactured in a method comprising a step of preparing a P type or N type semiconductor substrate, a step of forming a fourth trench hole around a region for forming a MOS transistor in the semiconductor substrate, a step of burying an SiO
2
in the fourth trench hole, a step of forming first, second and third trench holes in a region surrounding by the SiO
2
, a step of forming a gate oxide film on the entire surface of the inside of the first trench hole, a step of forming an N type impurity layer on the entire surface of the inside of the second and third trench holes, and a step of burying a conductive polysilicon film in the first, second and third trench holes to form as gate, source and drain electrodes, respectively.
It also includes a step of forming an intermediate insulating layer, contact holes, a wiring electrode, and a passivation layer.
According to this structure, it does not require oxygen ion implantation technology of high dose and high energy or heat treatment at high temperature and for a long time, and it is possible to manufacture a SOI type MOS element having a completely new SOI structure different from the conventional SOI structure, excellent in crystallinity, low in power consumption, high in speed, and smaller in size, and excellent in reliability and other performances.
REFERENCES:
patent: 6025629 (2000-02-01), Ipposhi et al.
patent: 6111293 (2000-08-01), Liao
Huynh Andy
Kunitz Norman N.
Nelms David
Oki Electric Industry Co. Ltd.
Venable
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