Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-03-09
2002-02-05
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S106000, C438S118000, C438S121000, C438S123000, C438S125000, C438S455000, C438S457000, C438S459000, C257S678000
Reexamination Certificate
active
06344372
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a semiconductor device and a method of manufacturing the semiconductor device, particularly to the semiconductor device having an improved packaging structure of IC (Integrated Circuit). LSI (Large Scale Integration), and the like, which have plenty of terminals and conductive wires arranged in narrow pitch fashion, and the method of manufacturing such a semiconductor device.
Conventionally, a method using shrinkage power of a heat-hardened resin has been employed to connect a plurality of projective electrodes of a semiconductor element after sealing with conductive wires on a substrate. An example of the method is exemplified, as a prior art, in Japanese Patent Publication No.Hei
6-105727
, namely, 105727/1994. As will later be described more in detail, a semiconductor device fabricated by the use of the conventional method has a structure in which hardenning and shrinking power of an insulative resin is larger than a thermal stress of the insulative resin at a desirable temperature.
However, the shrinking power of the insulative resin for fixing the semiconductor element to the substrate is generated uniformly over a connected area between the semiconductor element and the substrate. The shrinking power of the insulative resin is larger at a high temperature than at an ordinary temperature. A difference of the shrinking power therebetween is generated, as a thermal stress, repeatedly on the insulative resin every time heat is generated and dissipated by the semiconductor device on use. The thermal stress makes the insulative resin fatigued and accelerates a deterioration thereof so that the shrinkage power of the insulative resin is decreased. As a result, a quantity of expansion of the insulative resin comes to exceed a quantity of shrinkage thereof. Consequently, voids are generated between a projective electrode of the semiconductor element and a conductive wire of the substrate. Accordingly, a defective conduction is inevitably caused to occur between the projective electrode and the conductive wire.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a semiconductor device which is capable of preventing a conduction between a projective electrode of the semiconductor element and a conductive wire of the substrate from becoming defective by a thermal stress generated on an insulative resin.
It is another object of the present invention to provide a method of manufacturing the semiconductor device, in which a semiconductor device is readily manufactured at a comparatively low cost with high reliability of connection between a projective electrode of a semiconductor element and a conductive wire of a substrate.
Other objects of the present invention will become clear as the description proceeds.
According to an aspect of the present invention, there is provided a semiconductor device comprising: a substrate which has a primary surface; a conduction wire formed on the primary surface; a semiconductor element which has a secondary surface; a projective electrode formed on the secondary surface; an insulative resin for adhesion which is applied between the primary surface and the secondary surface and which shrinks by hardening thereof; the substrate and the semiconductor element being adhered to each other by the hardening of the insulative resin with the projective electrode and the conduction wire corresponding with each other, so that an electrical connection between the projective electrode and the conduction wire is achieved and that a residual stress is generated in the insulative resin; and the residual stress having a maximum value thereof around the projective electrode.
The residual stress may further have a minimum value thereof around a central portion of the semiconductor element, wherein the electrical connection is kept by a tensile power based on the residual stress around the projective electrode.
The minimum value may be null.
A primary part of the substrate inside of the conduction wire corresponding to the projective electrode may be thinner than a secondary part of the substrate outside of the conduction wire corresponding to the projective electrode.
A secondary portion may comprise multiple layers while the primary portion comprises at least one layer fewer than the multiple layers of the secondary portion, so that the substrate has flexibility.
The substrate may include an organic substrate.
The insulative resin for adhesion may be a heat-hardened type.
According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device including a substrate having a primary surface, a semiconductor element having a secondary surface, and a plurality of projective electrodes formed on the secondary surface, the method comprising the steps of: applying a heat-hardened insulative resin to a predetermined position of the primary surface of the substrate having the plurality of conduction wires; bringing the secondary surface of the semiconductor element heated up to a first temperature not lower than 80° C. into contact with the primary surface of the substrate heated up to a second temperature not lower than 50° C. with the plurality of projective electrodes being positioned to the plurality of conduction wires, respectively; pressing the semiconductor element on the substrate to push the plurality of projective electrodes onto the plurality of conduction wires, respectively, each of the plurality of projective electrodes being deformed while each of the plurality of conduction wires sinking into the substrate from the primary surface; and continuously heating at least the semiconductor element to make the heat-hardened insulative resin be hardened to shrink, so that a part of the substrate under the semiconductor element is pulled up towards the semiconductor element.
A residual stress generated when the heat-hardened insulative resin is hardened to shrink may have a maximum value thereof around the projective electrode and a minimum value thereof around a central portion of the semiconductor element, an electrical connection between each of the plurality of projective electrodes and each of the plurality of conduction wires being kept by a tensile power based on the residual stress around the projective electrode.
The minimum value may be null.
A primary part of the substrate inside of the conduction wire corresponding to the projective electrode may be thinner than a secondary part of the substrate outside of the conduction wire corresponding to the projective electrode.
The secondary portion may comprise multiple layers while the primary portion comprises at least one layer fewer than the multiple layers of the secondary portion so that the substrate has flexibility.
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patent: 6100112 (1998-10-01), Amano et al.
patent: 6263649 (1999-02-01), Yoshino
patent: 5926694 (1999-07-01), Chigawa et al.
patent: 5930599 (1999-07-01), Fugimoto et al.
patent: 5937277 (1999-08-01), Matsuda et al.
patent: 6214649 (1999-08-01), Ishida
patent: 6046071 (2000-04-01), Sawai et al.
patent: 6184066 (2001-02-01), Chino et al.
patent: 6-105727 (1994-12-01), None
Takahashi et al. “Numerical analysis of fine lead bonding-Effect of pad thickness on deformation” IEEE trans on components and packaging tech. vol. 22 No. 2 Jun. 1999 p. 291-298.
Ohuchi Rieka
Suzuki Takatoshi
Lee Granville D
Smith Matthew
Whitham Curtis & Christofferson, P.C.
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