Adhesive bonding and miscellaneous chemical manufacture – Methods – Surface bonding and/or assembly therefor
Reexamination Certificate
2000-12-05
2002-04-30
Aftergut, Jeff H. (Department: 1733)
Adhesive bonding and miscellaneous chemical manufacture
Methods
Surface bonding and/or assembly therefor
C156S305000, C156S356000, C156S578000, C427S096400, C029S832000, C029S739000
Reexamination Certificate
active
06379484
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to an apparatus and method for manufacturing a flip-chip-type semiconductor package, and more specifically to an apparatus and method for manufacturing a semiconductor package in which formation of a resin-less void in the gap between the semiconductor chip and a mount board is suppressed, so that the grade and quality of the semiconductor device is improved.
There has recently been developed a “flip-chip” method for packaging semiconductor chips. The flip-chip method produces a small semiconductor package in which a semiconductor chip is bonded to a mount board. Typically, solder bumps are formed on the electrode pads of the semiconductor chip, and the solder bumps are connected to the pads and wiring of the mount board. A resin is filled in a gap between the semiconductor chip and the mount board to secure the package.
FIG. 1
shows a conventional method for fabricating a semiconductor package that has a semiconductor chip and a mount board connected in a flip-chip manner with a resin filled in the gap between the semiconductor chip and the mount board. As shown, a semiconductor chip
1
is flip-chip-connected to a mount board
2
, and a syringe
4
is moved by means of a driving mechanism
3
along one side of the semiconductor chip
1
in the direction indicated by the arrow in the figure.
As the syringe is moved along the chip, a resin
5
contained in the syringe
4
is supplied (for bonding) from the tip of a nozzle
6
. Ideally, the resin would gradually enter the gap and would flow from the left to the right by virtue of a capillary phenomenon until the entire gap between the semiconductor chip
1
and mount board
2
was filled with the resin, as shown in
FIGS. 2A
to
2
C. However, the rate at which the resin enters the gap between the chip and mount board is typically lower than the rate at which the resin advances around the periphery of the semiconductor chip. Thus, using the conventional method in which the resin is uniformly supplied by a syringe driven at a constant speed, it is difficult to completely fill the gap between the semiconductor chip and the mount board.
FIGS. 3A
to
3
C show see-through views of the semiconductor chip to illustrate how the resin typically enters the gap between the semiconductor chip and mount board when the conventional method is used. Initially, as shown in
FIG. 3A
, a resin
5
is deposited along one side of the semiconductor chip
1
. The mount board
2
has a substantially flat surface and a substantially uniform in-plane temperature distribution, so the resistance to the flow of the resin near the central portion of the semiconductor chip is higher than around the peripheral portion of the chip. Due to this difference, the rate at which the resin enters the gap is lower than the rate at which the resin advances around the periphery of the semiconductor chip, as shown in FIG.
3
B. Consequently, the resin may fail to completely fill the gap, and instead enclose air (or peripheral atmosphere) so that a void
7
is formed, as shown in FIG.
3
C. The void
7
lowers the grade and quality of the semiconductor device because it can lead to defects or cracks. More specifically, moisture entering the void can deteriorate the solder bridge, short-circuit the wiring elements on the mount board, or crack the semiconductor device.
As explained above, when the conventional method is used, resin-less voids tend to form in the gap between the semiconductor chip and the mount board, and thus the grade and quality of the resultant semiconductor device are lowered.
BRIEF SUMMARY OF THE INVENTION
In view of these problems, it is an object of the present invention to remove the above-mentioned drawbacks and to provide an apparatus and method for manufacturing a semiconductor package in which the formation of resin-less voids is deterred so that the grade and quality of the semiconductor device is improved.
To achieve this object, one preferred embodiment of the present invention provides an apparatus for manufacturing a semiconductor package of the type in which a gap between a semiconductor chip and a mount board is filled with a resin. The apparatus includes resin supply means for supplying the resin along one side of the semiconductor chip, and resin supply control means for controlling the amount of resin supplied by the resin supply means such that more resin is supplied near the central portion of the semiconductor chip than near the end portions of the semiconductor chip. The apparatus supplies the resin such that it is relatively less concentrated near the peripheral portions of the chip, and thus the rate at which the resin flows near the peripheral portions of the chip is reduced. As a result, the formation of resin-less voids is deterred.
In another preferred embodiment of the present invention, the object is achieved by providing a method for manufacturing a semiconductor package of the type in which a gap between a semiconductor chip and a mount board is filled with a resin. The method includes the steps of connecting the semiconductor chip and the mount board, and supplying the resin along one side of the semiconductor chip in such a manner that more resin is supplied near a central portion of the semiconductor chip than near the end portions of the semiconductor chip. Accordingly, the resin is supplied such that it is relatively less concentrated near the peripheral portions of the chip. As a result, the formation of resin-less voids is deterred.
Other objects, features, and advantages of the present invention will become apparent from the following detailed description. It should be understood, however, that the detailed description and specific examples, while indicating preferred embodiments of the present invention, are given by way of illustration only and various modifications may naturally be performed without deviating from the scope of the present invention.
REFERENCES:
patent: 5362354 (1994-11-01), Okura et al.
patent: 5710071 (1998-01-01), Beddingfield et al.
patent: 5747102 (1998-05-01), Smith et al.
patent: 5872051 (1999-02-01), Fallon et al.
patent: 5889332 (1999-03-01), Lawson et al.
patent: 5935375 (1999-08-01), Nakazawa et al.
patent: 5939206 (1999-08-01), Kneezel et al.
patent: 5939326 (1999-08-01), Chupp et al.
patent: 6124643 (2000-09-01), Brand
Nakazawa Takahito
Nomura Hiroshi
Ohshima Yumiko
Aftergut Jeff H.
Haran John T.
Hogan & Hartson L.L.P.
Kabushiki Kaisha Toshiba
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