CMOS small signal terminated receiver

Details CMOS small signal terminated receiver CMOS small signal terminated receiver

2000-05-30

2002-06-04

Tokar, Michael (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Bus or line termination

C326S026000, C326S027000, C326S083000, C326S086000

Reexamination Certificate

active

06400178

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to terminators which are applicable to complementary metal oxide semiconductor (CMOS) with triple wells integrated circuit technology and which are particularly useful for terminator networks.
RELATED APPLICATIONS
This application is related to the following concurrently filed application (s):
U.S. Ser. No. 09/580,290, filed May 30, 2000, entitled: CMOS Small Signal Terminator and Network, naming David T. Hui, inventor; and
U.S. Ser. No. 09/593,187, filed May 30, 2000, entitled: SOI Small Signal Terminator and Network, naming David T. Hui, inventor; and
U.S. Ser. No. 09/583,185, filed May 30, 2000, entitled: Method for use with a Terminator and Network, naming David T. Hui, inventor; and
U.S. Ser. No. 09/580,942, filed May 30, 2000, entitled: SOI Small Signal Switchable Adjustable Terminated Hysteresis Receiver, naming David T. Hui, inventor; and
U.S. Ser. No. 09/583,055, filed May 30, 2000, entitled: CMOS Small Signal Switchable Terminator Network, naming David T. Hui, inventor; and
U.S. Ser. No. 09/583,186, filed May 30, 2000, entitled: CMOS Small Signal Switchable Adjustable Impedence Terminator Network, naming David T. Hui, inventor; and
U.S. Ser. No. 09/580,789, filed May 30, 2000, entitled: CMOS Small Signal Switchable and Adjustable Terminator Network, naming David T. Hui, inventor; and
U.S. Ser. No. 09/583,188, filed May 30, 2000, entitled: CMOS Small Signal Switchable Impedence and Voltage Adjustable Terminator Network, naming David T. Hui, inventor; and
U.S. Ser. No. 09/580,805, filed May 30, 2000, entitled: CMOS Small Signal Switchable Impedence and Voltage Adjustable Terminator Network and Receiver Integration, naming David T. Hui, inventor; and
U.S. Ser. No. 09/580,680, filed May 30, 2000, entitled: CMOS Small Signal Switchable Impedence and Voltage Adjustable Terminator with Hysteresis Receiver Network, naming David T. Hui, inventor; And
U.S. Ser. No. 09/580,802, filed May 30, 2000, entitled: CMOS Small Signal Terminated Hysteresis Receiver, naming David T. Hui, inventor; and
U.S. Ser. No. 09/580,943, filed May 30, 2000, entitled: SOI Small Signal Terminated Receiver, naming David T. Hui, inventor.
This related application(s) and the present application are owned by one and the same assignee, International Business Machines Corporation of Armonk, N.Y.
The descriptions set forth in these co-pending applications are hereby incorporated into the present application by this reference.
TRADEMARKS
S/390 and IBM are registered trademarks of International Business Machines Corporation, Armonk, N.Y., U.S.A. Other names may be registered trademarks or product names of International Business Machines Corporation or other companies.
BACKGROUND
For signal interfaces between devices terminators have been used, as described for instance in U.S. Pat. No. 4,748,426: entitled “Active termination circuit for computer interface use”, granted May 31, 1998to Alexander Stewart for Rodime PLC, in an active termination circuit for a computer interface for reducing line reflection of logic signals. Such terminators have used a first and second resistor combination to permanently connect to a signal line that couples a plurality of peripheral devices to one another. The other ends of the first and second resistors are connected through a switching device to a positive voltage supply line and to logic ground, respectively. When termination of multiple devices was required, a plurality of resistor combinations were provided but on/off control of the switch in this example was achieved by one control that is located remote from the termination circuit systems. Integrated circuit interconnection structures have also used precision terminating resistors, as illustrated by U.S. Pat. No. 4,228,369, granted in October, 1980 to Anantha et al. for IBM.
As will be illustrated for chip interconnection, when resistor terminators are used in thin film semiconductor integrated circuits such as those used in metal oxide semiconductors (e.g. CMOS) today, they create hot spots which cannot be adequately cooled, so such resistor terminator circuits which create hot spots cannot be used in metal oxide semiconductor applications to provide terminators for chip to chip connections on chips using IBM's new sub-micron MOS (CMOS) technologies where because of the high currents used in these networks it is difficult or impossible to meet all the cooling and reliability requirements required for commercial performance. It has become necessary to invent a solution to interfacing devices which can be used in such environments on chips, and used for terminators in networks of chips and devices where there is a need to transmit digital data therebetween without overshoot and undershoot in signal transmission between the chips and devices or systems. These connections need to operate at a faster speed, accommodating data rate speeds ranging into hundreds of Mhz and Ghz.
The creation of a terminator which particularly may be fabricated for high speed metal oxide semiconductor (MOS) applications in integrated circuits is needed.
This invention relates to an integrated term receiver network which is useful for fast transmission of dig data, eliminating or reducing overshoot and undershoot in signal transmission between chips and between systems, in serial links and data buses, for minimizing ringing and similar noise problems, for providing electrostatic discharge (ESD) protection, particularly in high speed metal oxide semiconductor (MOS) integrated circuit applications, and mixed vender technology interface communications. The demand for fast data transmission has pushed the data rate into hundreds of Mhz and Ghz. Therefore it is advantages to reduce the signal swing so that the signal reach its desired digital ones or zeros voltage levels faster with lower power and with less noise generation.
Also, a conventional CMOS receiver does not have good control on its threshold voltage to deal with small signals.
SUMMARY OF THE INVENTION
The current preferred embodiment provides a CMOS small signal terminated receiver network which allows setting up a well balanced threshold voltage between the upper and lower logic levels, so that maximum noise tolerance between logic levels can be achieved for a receiver in a terminated receiver network. The terminator network is adapted for MOS and can match the characteristic impedance of the line.
The preferred terminator network is fast and suitable for small signal swings and may also be used in a mixed technologies communication.
It provides a terminator and receiver network which has low current flow and low power consumption.
The receiver that can receive small signals properly and have balanced noise tolerance between both upper and lower logic levels.
The preferred embodiment of the invention provides a terminator network that provides ESD protection at the input of an attached circuit.
These and other improvements are set forth in the following detailed description. For a better understanding of the invention with advantages and features, refer to the description and to the drawings.


REFERENCES:
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patent: 6262591 (2001-07-01), Hui

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