Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
1999-11-22
2002-08-06
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S349000, C257S353000, C257S507000, C257S508000, C257S520000
Reexamination Certificate
active
06429486
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more specifically to a semiconductor support substrate potential fixing structure for a SOI (silicon on insulator) semiconductor device and a process for forming the same.
In general, a semiconductor device having a SOI (silicon on insulator) structure comprises a layered structure composed of a semiconductor layer used for forming semiconductor circuit components (such as transistors), a semiconductor support substrate for supporting the semiconductor layer, and an insulating layer provided between the semiconductor layer and the semiconductor support substrate. The semiconductor device having the SOI structure is used either by putting the semiconductor support substrate in an electrically opened condition, or by forming an electrode on a back surface of the semiconductor support substrate and fixing a potential of the back surface electrode. When the potential of the back surface electrode is not fixed, the potential of the semiconductor support substrate varies because of an input signal and others, with the result that the semiconductor circuit components (such as transistors) are influenced through the insulating layer and resultantly cause a malfunction.
The fixing of the potential of the semiconductor support substrate is disclosed by Japanese Patent Application Pre-examination Publication No. JP-A-05-144930 (an English abstract of JP-A-05-144930 is available from the Japanese Patent Office and the content of the English abstract of JP-A-05-144930 is incorporated by reference in its entirety into this application) and Japanese Patent Application Pre-examination Publication from the Japanese Patent Office and the content of the English abstract of JP-A-09-283640 is incorporated by reference in its entirety into this application).
However, in a package such as a tape carrier package in which the back surface electrode of the semiconductor support substrate cannot be connected to an external terminal, it is impossible to mount on a tap carrier the semiconductor device having the back surface electrode for fixing the potential of the semiconductor support substrate.
BRIEF SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide an SOI type semiconductor device and a process for forming the same, which has overcome the above mentioned problem of the prior art.
Another object of the present invention is to provide an SOI type semiconductor device, capable of fixing the potential of the semiconductor support substrate to prevent the malfunction of the semiconductor circuit components (such as transistors), in a package so configured that a back surface electrode cannot be connected to an external terminal, and a process for forming the same.
The above and other objects of the present invention are achieved in accordance with the present invention by an SOI type semiconductor device in which an electrode for fixing the potential of a semiconductor support substrate is formed at an SOI layer side where a semiconductor circuit component (such as a transistor) is formed.
According to a first aspect of the present invention, there is provided a semiconductor device of a silicon-on-insulator structure which includes a semiconductor support substrate, a first insulating layer formed on the semiconductor support substrate, and a semiconductor layer formed on the first insulating layer, the semiconductor device comprising a conductive layer filled in a first hole penetrating through the semiconductor layer and the first insulating layer, the conductive layer being electrically connected to the semiconductor support substrate, a second insulating layer formed on the semiconductor layer, and a semiconductor support substrate potential fixing electrode formed on the second insulating layer and filled into a second hole penetrating through the second insulating layer in alignment with the first hole, the semiconductor support substrate potential fixing electrode being electrically connected through the conductive layer to the semiconductor support substrate.
In an embodiment of the semiconductor device, the semiconductor layer is divided by a device isolation region into a plurality of device formation regions which are electrically isolated from each other by the device isolation region, and the first hole is formed to penetrate through the semiconductor layer within one of the plurality of device formation regions and the first insulating layer, and the conductive layer being electrically connected to the semiconductor layer within the one of the plurality of device formation regions.
In another embodiment of the semiconductor device, the semiconductor layer is divided by a device isolation region into a plurality of device formation regions which are electrically isolated from each other by the device isolation region, the device isolation region extending at least from a top surface to a bottom surface of the semiconductor layer, and the first hole is formed in the device isolation region to reach the semiconductor support substrate.
Specifically, the device isolation region is formed of an insulating material, and the first hole. is formed in the device isolation region in such a manner that the conductive layer filled in the first hole is electrically insulated from the semiconductor layer by the insulating material remaining on a side wall of the first hole. A side surface of the first hole is surrounded by an insulator layer extending at least from the top surface of the semiconductor layer to a top surface of the semiconductor support substrate.
For example, the conductive layer filled in the first hole is formed of a polycrystalline semiconductor having the same conductivity as that of the semiconductor support substrate.
According to a second aspect of the present invention, there is provided a method for forming a semiconductor device of a silicon-on-insulator structure which includes a semiconductor support substrate, a first insulating layer formed on the semiconductor support substrate, and a semiconductor layer formed on the first insulating layer, the method comprising the steps of:
forming a first hole and a groove penetrating through the semiconductor layer and the first insulating layer to reach the semiconductor support substrate, so that the semiconductor layer is divided by the groove into a plurality of device formation regions which are electrically isolated from each other by the groove;
filling a second insulating layer into the groove;
filling a conductive material into the first hole so that the conductive material filled into the first hole is electrically connected to the semiconductor support substrate at a bottom of the first hole;
forming a third insulating layer to cover the semiconductor layer;
forming a second hole to penetrate through the third insulating layer in alignment with the first hole and to reach the conductive material filled into the first hole; and
forming a semiconductor support substrate potential fixing electrode on the third insulating layer to fill the second hole so that the semiconductor support substrate potential fixing electrode is electrically connected to the semiconductor support substrate through the conductive material filled into the first hole.
According to a second aspect of the present invention, there is provided a method for forming a semiconductor device of a silicon-on-insulator structure which includes a semiconductor support substrate, a first insulating layer formed on the semiconductor support substrate, and a semiconductor layer formed on the first insulating layer, the method comprising the steps of:
forming a groove penetrating through the semiconductor layer and the first insulating layer to reach the semiconductor support substrate, so that the semiconductor layer is divided by the groove into a plurality of device formation regions which are electrically isolated from each other by the groove;
forming a second insulating layer to cover a bottom surface and a side surface of the groove;
Abe Katsumi
Mori Kazuhisa
NEC Corporation
Sughrue & Mion, PLLC
Tran Minh Loan
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