Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2000-06-12
2002-09-24
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000
Reexamination Certificate
active
06457158
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a method and a device for placing an electrode for signal observation, and more particularly to, a method and a device for placing automatically an electrode for signal observation used to detect a node potential on a desired circuit in semiconductor integrated circuit.
BACKGROUND OF THE INVENTION
In semiconductor devices, part of signal line is wired on its top layer or an electrode for signal observation is placed at part of signal line so as to detect node potential on a desired circuit in the device by a direct contact method using a probe (probe needle) or a non-contact analysis method using an EB (electron beam) tester etc.
An example of method of placing an electrode for signal observation is disclosed in Japanese patent application laid-open No.02-191359 (1990). In this method, an electrode for signal observation is registered as a layout cell like a logic-circuit cell, and is defined to a node desired to place signal observation electrode in circuit connection information like a circuit cell, and the placement of signal observation electrode is conducted using the automatic placement wiring by standard cell system.
However, the prior method of placing an electrode for signal observation gives problems below.
1) In conducting the signal observation, the operator has to check out where the electrode for observation of a node desired is placed by looking at layout data, since placement information of the electrode for signal observation is not listed in the layout data. Thus, a long time is wasted.
2) The area of automatic placement wiring increases due to the placement of the layout cell that is unnecessary for the circuit operation.
3) It is highly possible that an erroneous connection is incorporated into the circuit connection information, since it is necessary to describe the definition of placement of signal observation electrode, which is unnecessary essentially, in the circuit connection information in manual operation.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a method and a device for placing an electrode for signal observation that the placement of electrode for signal observation can be performed automatically without influencing the chip size, and that placement information of signal observation electrode for a wire desired to conduct signal observation can be searched easily.
According to the invention, a method for placing an electrode for signal observation, comprises the steps of:
conducting equipotential tracking to placement wiring information obtained by automatic layout design based on wiring information such as layer number of wire and layer number of contact hole to search electrical connection between terminal and wire of layout cell and between wires;
conducting a collation to give the correspondence in connection relation between the wiring obtained by the search result and wiring in circuit connection information describing the connection between circuit cells;
adding wire names estimated from the circuit connection information to all equipotential wires;
checking whether a top-layer wire exists about all the equipotential wires, if the top-layer wire exists, then extracting and outputting the wire name and top-layer wire information, and if the top-layer wire does not exist, then checking whether the lead-out to the top layer of equipotential wire is possible or not in cases of moving the wire and not moving the wire, and outputting the check result, so that the top-layer wire is used as electrode for signal observation.
According to another aspect of the invention, a device for placing an electrode for signal observation used to detect a node potential on a desired circuit in semiconductor integrated circuit, comprises:
an input device to which circuit connection information describing the connection between circuit cells and placement wiring information obtained by automatic layout design are input;
a storage device that comprises a wiring information storing section that stores wiring information which includes layer number of each wire defined to each process in placing wires and layer number of contact hole to connect electrically between lower layer wiring and upper layer wiring, and a design rule storing section that stores a standard of placement, such as interval between wires and width of wire, for each wire layer and contact hole required in placing wires;
a tracking means for conducting the equipotential tracking to the placement wiring information from the input device based on information read out from the wiring information storing section of the storage device to search the electrical connection between terminal and wire of layout cell and between wires;
a collating and name-adding means for collating the search result of the tracking means and the circuit connection information from the input device, and adding a wire name to a wire with a correspondence collated;
a top-layer wire searching means for checking whether a top-layer wire to the wire with the name added by the collating and name-adding means exists or not based on information from the wiring information storing section of the storage device;
a wire converting means for conducting the movement, placement and connection of wire based on information from the design rule storing section; and
an output device that outputs result information from the top-layer wire searching means and the wire converting means.
In this invention, by inputting the placement wiring information and circuit connection information and by conducting the equipotential tracking to the placement wiring information based on wiring information stored in advance, the electrical connection between terminal and wire of layout cell and between wires can be searched. Then, conducted are collating the correspondence in connection relation between a wire from the search result and a wire in the circuit connection information, and adding arbitrary wire names estimated from the circuit connection information to all equipotential wires. Further, it is checked whether a top-layer wire connected exists or not about all the equipotential wires. If the top-layer wire exists, then the wire name and top-layer wire information are extracted and output. On the other hand, if the top-layer wire does not exist, then it is checked whether the lead-out to the top-layer wire is possible by moving the wire, and according to the result, a given processing is conducted. Thus, an electrode on circuit desired to observe can be searched easily.
REFERENCES:
patent: 4823276 (1989-04-01), Hiwatashi
patent: 5196362 (1993-03-01), Suzuki
patent: 5315535 (1994-05-01), Kikuchi et al.
patent: 5618744 (1997-04-01), Suzuki et al.
patent: 5790414 (1998-08-01), Okano et al.
patent: 5801960 (1998-09-01), Takano et al.
patent: 5987743 (1999-11-01), Yui
patent: 63-129466 (1988-06-01), None
patent: 2-191359 (1990-07-01), None
Hutchins, Wheeler & Dittmar
Lin Sun James
NEC Corporation
Siek Vuthe
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