Reduction of imprint in ferroelectric devices using a...

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Reexamination Certificate

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C365S199000

Reexamination Certificate

active

06392919

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally ferroelectric capacitors and, more particularly, to reducing imprint in ferroelectric capacitors.
2. Prior Art
Imprint refers to the preference of one polarization state over another in a ferroelectric [T. Mihara, H. Watanabe and C. A. Pas De Araujo, Jpn. J. Appl. Phys. 32 4168 (1993)]. This is typically observed as an asymmetry in the hysteresis loop, or polarization versus applied voltage (P-V), whereby the loop is shifted along the voltage axis. Such voltage shifts can lead to failure of a ferroelectric memory device, as either the coercive field becomes too large in one direction, or the two polarization states become indistinguishable to the sense amplifier.
Imprint can be induced in ferroelectric capacitors by a number of different processes [Id. and W. L. Warren, D. Dimos, G. E. Pike, B. A. Tuttle, M. V. Raymond, R. Ramesh and J. T. Evans Jr., Appl. Phys. Lett. 67 (6), 866 (1995)]. In the case of lead zirconate titanate (PZT), samples cooled from the processing temperature (650° C.) in a oxygen reducing atmosphere will typically show an asymmetry in voltage across a capacitor (±V
o
) at room temperature. Under the right conditions, heating the PZT under an applied bias, or applying ultra violet (UV) light, can also result in imprint. Additionally, a unipolar pulse large enough to pole the sample, for 10
9
or more cycles can be applied. The unipolar pulses, while not fatiguing the sample, will produce a voltage shift in the P-V curve opposite in direction to the pulse polarity.
There are methods known in the art for either reducing or eliminating imprint effects in ferroelectric devices. However, they involve either heating the ferroelectric devices to temperatures of 100° C. and above while poling, exposing the ferroelectric devices to UV light, or a post annealing treatment under an oxygen ambient [See G. E. Pike, W. L. Warren, D. Dimos, B. A. Tuttle, R. Ramesh, J. Lee, V. G. Keramidas and J. T. Evans Jr., Appl. Phys. Lett. 66 (6 ), 484 (1995) and E. G. Lee, D. J. Wouters, G. Willems and H. E. Maes, Appl. Phys. Lett. 69, 1223 (1996)]. While useful, these approaches are not practical for certain applications of ferroelectric devices, such as in computer memory.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide a method for reducing or eliminating imprint effects in ferroelectric devices without exposing the ferroelectric devices to excessive temperatures.
It is a further object of the present invention to provide a method for reducing or eliminating imprint effects in ferroelectric devices without exposing the ferroelectric devices to UV light.
It is yet a further object of the present invention to provide a method for reducing or eliminating imprint effects in ferroelectric devices without exposing the ferroelectric devices to a post annealing treatment under an oxygen ambient.
It is still yet a further object of the present invention to provide a method for reducing or eliminating imprint effects in ferroelectric devices which can be applied to ferroelectric memory cells in a computer.
Accordingly, a method for reducing imprint in a ferroelectric device is provided. The method comprises the steps of: applying a signal having a bipolar pulse shape for a predetermined time to the ferroelectric device; and decreasing the signal amplitude gradually in predetermined intervals of time and amplitude.
Also provided is an apparatus for reducing imprint in a ferroelectric device. The apparatus comprises: means for applying a signal having a bipolar pulse shape for a predetermined time to the ferroelectric device; and means for decreasing the signal amplitude gradually in predetermined intervals of time and amplitude.
Preferably, the bipolar shape signal is one of a sinusoidal wave, square wave, or sawtooth wave and the ferroelectric device is a capacitor or a memory cell of a computer.


REFERENCES:
patent: 5740100 (1998-04-01), Yoo
patent: 6108111 (2000-08-01), Thakoor et al.
Warren, W.L., et al., “Voltage shifts and imprint in ferroelectric capacitors”, Appl. Phys. Lett.; 67 (6), pp. 866-868, Aug. 7, 1995.
Lee, E.G., et al., “Voltage shift and deformation in the hysteresis loop of Pb(Zr, Ti)O3 thin film by defects”, Appl. Phys. Lett. 69 (9), pp. 1223-1225, Aug. 26, 1996.
Pike, G.E., et al., “Voltage offsets in (Pb,La)(Zr,Ti)O3 thin films”, Appl. Phys. Lett. 66 (4),, 484-486, Jan. 23, 1995.
Schubring, N.W., et al., “Ferroelectric Hysteresis Tracer Featuring Compensation and Sample Grounding”, The Review of Scientific Instruments, vol. 35, No. 11, pp. 1517-1521, Nov. 1964.
Mihara, T., et al., “Evaluation of Imprint Properties in Sol-Gel Ferroelectric Pb(ZrTi)O3 Thin-Film Capacitors”, Japan. J. Appl. Phys.. vol. 32, Pt. 1, No. 9B, pp. 4168-4174, 1993.

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