Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Bus or line termination
Reexamination Certificate
2000-05-30
2002-03-12
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Signal sensitivity or transmission integrity
Bus or line termination
C326S026000, C326S027000, C326S083000, C326S086000
Reexamination Certificate
active
06356103
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to terminators which are applicable to metal oxide semiconductor on insulator (MOS-soi) with triple wells integrated circuit technology and which are particularly useful for terminator networks.
This related application(s) and the present application are owned by one and the same assignee, International Business Machines Corporation of Armonk, N.Y.
The descriptions set forth in these co-pending applications are hereby incorporated into the present application by this reference.
TRADEMARKS
S/390 and IBM are registered trademarks of International Business Machines Corporation, Armonk, N.Y., U.S.A. Other names may be registered trademarks or product names of International Business Machines Corporation or other companies.
BACKGROUND
For signal interfaces between devices terminators have been used, as described for instance in U.S. Pat. No. 4,748,426: entitled “Active termination circuit for computer interface use”, granted May 31, 1988 to Alexander Stewart for Rodime PLC, in an active termination circuit for a computer interface for reducing line reflection of logic signals. Such terminators have used a first and second resistor combination to permanently connect to a signal line that couples a plurality of peripheral devices to one another. The other ends of the first and second resistors are connected through a switching device to a positive voltage supply line and to logic ground, respectively. When termination of multiple devices was required, a plurality of resistor combinations were provided but on/off control of the switch in this example was achieved by one control that is located remote from the termination circuit systems. Integrated circuit interconnection structures have also used precision terminating resistors, as illustrated by U.S. Pat. No. 4,228,369, granted in October, 1980 to Anantha et al. for IBM.
As will be illustrated for chip interconnection, when resistor terminators are used in thin film semiconductor integrated circuits such as those used in metal oxide semiconductors (e.g.CMOS) today, they create hot spots which cannot be adequately cooled, so such resistor terminator circuits which create hot spots cannot be used in metal oxide semiconductor applications to provide terminators for chip to chip connections on chips using IBM's new sub-micron MOS (CMOS) technologies where because of the high currents used in these networks it is difficult or impossible to meet all the cooling and reliability requirements required for commercial performance. It has become necessary to invent a solution to interfacing devices which can be used in such environments on chips, and used for terminators in networks of chips and devices where there is a need to transmit digital data therebetween without overshoot and undershoot in signal transmission between the chips and devices or systems. These connections need to operate at a faster speed, data rate speeds ranging into hundreds of Mhz and Ghz.
The creation of a terminator which particularly may be fabricated for high speed metal oxide semiconductor on insulator (MOS-soi) applications with triple wells in integrated circuits is needed.
SUMMARY OF THE INVENTION
This invention creates a terminator for a terminator network which is useful for fast transmission of digital data between devices, in chips and systems, substantially eliminating or greatly reducing overshoot and undershoot in signal transmission between devices, in chips and systems, in serial links and data buses, and which can be fabricated for high speed metal oxide semiconductor integrated circuit applications. Construction of resistor terminators on a chip using sub-micron MOS is especially difficult because of the high currents in the networks, and yet the illustrated embodiment of the invention has achieved a terminator solution for connecting devices meeting all the cooling and reliability requirements of current technology while minimizing ringing and similar noise problems as well as providing electrostatic discharge (ESD) protection, in bulk applications, and particularly in high speed metal oxide semiconductor integrated circuit applications and mixed vender technology interface communication applications. As demand for fast data transmission has pushed the data rate into hundreds of Mhz and Ghz, the terminator described reduces the signal swing between networked elements so that the signal reaches its desired digital ones or zeros voltage levels faster with lower power and with less noise generation.
In accordance with the invention, the terminator of the preferred embodiment can be used in a network adapted to be implemented in MOS technology with the terminator matching the characteristic impedance of the network transmission line. It provides a fast terminator network suitable for connections having small signal swings and which may also be used in a mixed technologies communication.
The present invention provides a terminator network which has low current flow and low power consumption.
Still another improvement provided by the present invention is that the terminator network provides ESD protection at the input of an attached circuit.
These and other improvements are set forth in the following detailed description. For a better understanding of the invention with advantages and features, refer to the description and to the drawings.
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Augspurger Lynn L.
Paik Steven S.
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