On-chip antenna, and systems utilizing same

Communications: radio wave antennas – Antennas – Spiral or helical type

Reexamination Certificate

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C340S572700, C257S491000

Reexamination Certificate

active

06373447

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
The present invention relates to semiconductor integrated circuit (IC) devices (chips) and, more particularly, to IC chips having an antenna formed thereon.
BACKGROUND OF THE INVENTION
With increasing dependents on local and wide area wireless networks, particularly those with low power (range) requirements, there is perceived to be a need to have an antenna structure integrated onto single semiconductor devices. One important lack has been an on-chip antenna structure.
The length and material of antennas normally determine the frequency and intensity of signals that maybe received or sent from the antenna. However with smaller and smaller local area wireless networks being contemplated, the concept of a room sized network area or building area with antennas mounted in walls and ceilings (whether independent separate antennas or multi-use antennas, such as using electrical wiring or telephone wiring as an antenna structure), the feasibility of using very low power antenna structures to transfer information from a local network to a wireless IC device or system containing such wireless IC device becomes practicable.
DISCUSSION OF THE PRIOR ART
The following documents, all of which are U.S. patents, all of which are incorporated by reference herein, disclose various techniques having some relevance to the present invention.
U.S. Pat. No. 4,724,427 (Feb. 2, 1998) discloses a transponder device.
FIG. 9
of the patent, reproduced as
FIG. 1
herein, shows a topographical representation of a transponder chip
100
in an embodiment that includes an antenna coil
104
as part of a monolithic chip
102
. As disclosed therein, the coil
104
is etched around the periphery of the chip substrate
102
. In the center of the coil
104
are found a custom logic circuit
106
, a programmable memory array
108
, and memory control logic
110
. Using the chip topography shown in this figure, a functionally complete transponder may be realized on a single semiconductor chip. (see column 11, lines 7-22; numbers edited)
In a similar manner, U.S. Pat. No. 5,345,231 (September 1994) discloses a contactless inductive data-transmission system.
FIG. 7
of the patent shows components of a chip having a substrate
52
which can photolithographically be integrated, including antenna coils
50
which can be in a plane above the semiconductor topography
51
of the chip. (column 7, lines 14-17) Notably, the antenna coils So are disposed around the periphery of the chip, as was the case in U.S. Pat. No. 4,724,427.
Various problems are attendant integrating an antenna on an integrated circuit (IC) chip. In the case of an antenna disposed about the periphery of the chip, as described by the patents discussed hereinabove, the location of the antenna interferes with conventional bond pad layout about the periphery of the chip. Also, the electromagnetic fields within the central area of an antenna laid out about the periphery of a chip can interfere with the operation of circuits located within the antenna.
Glossary
Unless otherwise noted, or as may be evident from the context of their usage, any terms, abbreviations, acronyms or scientific symbols and notations used herein are to be given their ordinary meaning in the technical discipline to which the invention most nearly pertains. The following terms, abbreviations and acronyms may be used in the description contained herein:
A/D: Analog-to-Digital (converter).
ALU: Arithmetic Logic Unit.
ASIC: Application-Specific Integrated Circuit.
ATM: Asynchronous Transfer Mode
bit: binary digit.
BLP: Board-Level Product.
byte: eight contiguous bits.
C: a programming language.
CAM: Content-Addressable Memory.
CAS: Column Address Strobe.
CCD: Charge-coupled device.
CD: Compact Disc.
CISC: Complex Instruction Set Computer (or Chip).
CMOS: Complementary Metal-Oxide Semiconductor.
CODEC: Encoder/De-Coder. In hardware, a combination of A/D and D/A converters. In software, an algorithm pair.
Core: A functional block intended to be embedded and integrated in broader logic design.
CPU: Central Processing Unit.
D/A: Digital-to-Analog (converter).
DAT: Digital Audio Tape.
DBS: Direct Broadcast Satellite.
DMA: Direct Memory Access.
DRAM: Dynamic Random Access Memory.
DSP: Digital Signal Processing (or Processor).
ECC: Error Correction Code.
EDO: Extended Data Output.
EDRAM: Extended DRAM.
EEPROM: Also E
2
PROM. An electrically-erasable EPROM.
EPROM: Erasable Programmable Read-Only Memory.
Flash: Also known as Flash ROM. A form of EPROM based upon conventional UV EPROM technology but which is provided with a mechanism for electrically pre-charging selected sections of the capacitive storage array, thereby effectively “erasing” all capacitive storage cells to a known state.
FPGA: Field-Programmable Gate Array
G: or (Giga), 1,000,000,000.
Gbyte: Gigabyte(s).
GPIO: General Purpose Input/Output.
HDL: Hardware Description Language.
HDTV: High Definition Television
IC: Integrated Circuit.
I/F: Interface.
I/O: Input/Output.
IEEE: Institute of Electrical and Electronics Engineers
JPEG: Joint Photographic Experts Group
K: (or kilo), 1000.
kernel: a core functionality of an operating (or other software) system.
KHz: KiloHertz (1,000 cycles per second).
LAN: Local Area Network
M: (or mega), 1,000,000
MAC: Media Access Control.
Mask ROM: A form of ROM where the information pattern is “masked” onto memory at the time of manufacture.
MCM: Multi-Chip Module.
Mb Megabyte
memory: hardware that stores information (data).
MHz: MegaHertz (1,000,000 cycles per second).
MIPS: Million Instructions Per Second
MLT: Multi-Level Technology.
MPEG: Motion Picture Experts Group. Standard for encoding moving images. Also widely used for high quality audio compression.
MPU: Micro Processing Unit.
NVRAM: Non-volatile RAM.
PLL: Phase Locked Loop.
PROM: Programmable Read-Only Memory.
PWM: Pulse Width Modulation.
PLD: Programmable Logic Device.
RAS: Row Address Strobe.
RAM: Random-Access Memory.
RISC: Reduced Instruction Set Computer (or Chip).
ROM: Read-Only Memory.
RTOS: Real Time Operation System
SCM: Single Chip Module
SDRAM: Synchronous DRAM.
SIE: Serial Interface Engine.
SOC: System On a chip
software: Instructions for a computer or CPU.
SRAM: Static Random Access Memory.
TCP/IP: Terminal Control Protocol/internet Protocol.
UART: Universal Asynchronous Receiver/Transmitter.
USB: Universal Serial Bus.
UV EPROM: An EPROM. Data stored therein can be erased by exposure to Ultraviolet (UV) light.
VCR: Video Cassette Recorder.
VHDL: VHSIC (Very High Speed Integrated Circuit) HDL.
WAN: Wide Area Network. Such as the telephone system or the Internet, or a satellite network.
ZISC: Zero Instruction Set Computer (or Chip).
BRIEF DESCRIPTION (SUMMARY) OF THE INVENTION
An object of the invention is to provide an improved technique for integrating an antenna on an integrated circuit (IC) chip.
Another object of the invention is to provide techniques for integrating multiple antennas on an integrated circuit (IC) chip.
According to the invention, a layer or multiple layers of connected metal (or other suitable conductive material such as polysilicon) are placed on an integrated circuit (IC) chip so as to form an antenna structure.
One or more antennas may thus be formed on an IC chip.
Such antennas may be in a single plane of metal, or may be in multiple planes of metal connected as by filled vias.
Additionally the on-chip (or on the IC chip) antenna structure maybe connected electrically with an additional antennae such as could be achieved on a substrate material or an attachable package including a heatsink antenna attached to the package.
Additionally as new packaging techniques including ball grid arrays (BGA), particularly micro-ball grid arrays (&mgr;BGA) on the IC chip instead of bond pads, allow greater opportunities for interconnection on an IC chip, larger antenna structures may be integrated onto an IC chip without extensive routing problems as would have occurred with exclusively periphery leads.
Various shapes and forms of antennas are disclosed herein, including peripheral wrap

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