Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2000-11-13
2002-04-30
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S626000, C438S627000, C438S629000, C438S643000, C438S645000
Reexamination Certificate
active
06380079
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a metal wiring in a semiconductor device and a method for fabricating the same, which can form a stable barrier metal film inside a contact hole.
2. Background of the Related Art
The wiring in the semiconductor device is directed to multilayer wiring, keeping pace with the high density device packing trend, in which a size of a contact hole in a semiconductor substrate or a via hole between multilayer metal wiring is reduced as an area of the device is reduced. Recently, such reduced holes are mostly stuffed with a metal film by chemical vapor deposition. In the chemical vapor deposition for forming the metal film, a source gas and a reduction gas make reaction to form the metal film, when, as in general the source gas has a good reactivity with the semiconductor substrate or an aluminum wiring, to cause defects in source/drain regions formed in an active region when the source gas makes reaction with the semiconductor substrate, and to form compounds in an AIX group when the source gas makes reaction with an aluminum wiring, which causes a problem of a wiring reliability due to an increased resistance. Therefore, in order to suppress mutual diffusion or chemical reaction between different materials, a barrier metal film is formed before the formation of the metal wiring, of which related art method will be described, wherein the barrier metal film is formed in a contact hole, with reference to the attached drawings. FIGS.
1
A~
1
D illustrate sections showing the steps of a related art method for fabricating a metal wiring.
Referring to
FIG. 1A
, the related art method for fabricating a metal wiring starts with depositing an interlayer insulating film (Inter-Layer Dielectric: ILD, or Inter-Metal Dielectric: IMD)
2
on a semiconductor substrate
1
. The interlayer insulating film
2
is formed for insulating a transistor for driving a device from a capacitor or a metal wiring, or between overlying and underlying wiring in multilayered wiring. And, though not shown in the drawing, a photoresist film is coated on the interlayer insulating film
2
, and selectively patterned by exposure and development until one region of the interlayer insulating film
2
is exposed, and used as a mask in subjecting the interlayer insulating film
2
to anisotropic etching, to form a contact hole
3
in one region of the semiconductor substrate
1
. The contact hole
3
may be formed in source/drain regions, or on an underlying metal wiring in multilayered metal wiring. As shown in
FIG. 1B
, a barrier metal film
4
is deposited on an entire surface of the interlayer insulating film
2
inclusive of the contact hole
3
by physical, or chemical vapor deposition, and a chemical vapor deposition metal film
5
is formed on the barrier metal film
4
to stuff the contact hole
3
. As shown in
FIG. 1C
, the chemical vapor deposition metal film
5
is removed by plasma etching or CMP (Chemical Mechanical Polishing) to leave the chemical vapor deposition film
5
only in the contact hole
3
, to form a plug
5
a
in the contact hole
3
. In this instance, the barrier metal film
4
is left intact on the interlayer insulating film
2
. Then, as shown in FIG. ID, a metal wiring
6
is formed on the barrier metal film
4
so as to be in contact with the plug
5
a
by physical vapor deposition.
However, the foregoing related art method for fabricating a metal wiring in a semiconductor device has the following problems.
An aspect ratio of the contact hole, which is formed on source/drain regions or on an underlying metal wiring in multilayered metal wiring, becomes the greater while an area of the contact hole becomes the smaller as a device packing density becomes the higher and a memory size of the device becomes the larger. According to this, formation of the barrier metal film for suppressing defects and diffusion under the contact hole is difficult, and the formation of the barrier metal film on an entire inside surface of the contact hole increases a resistance of the metal wiring.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a metal wiring in a semiconductor device and a method for fabricating the same that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a metal wiring in a semiconductor device and a method for fabricating the same, in which a barrier metal film can be formed under a contact hole regardless of an aspect ratio and an area of the contact hole.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the metal wiring in a semiconductor device includes a first interlayer insulating film having a first contact hole to a region of a semiconductor substrate, a barrier metal film on an inside surface of the first contact hole, a second interlayer insulating film having a second contact hole to the barrier metal film formed on the first interlayer insulating film, a contact plug in the first and second contact holes in contact with the barrier metal film, and a metal wiring formed on the second interlayer insulating film in contact with the contact plug.
In other aspect of the present invention, there is provided a method for fabricating a metal wiring in a semiconductor device, including the steps of (1) forming a first interlayer insulating film on a semiconductor substrate having a first contact hole to a region of the semiconductor substrate, (2) forming a barrier metal film on a surface of the first contact hole, (3) forming a second interlayer insulating film on the first interlayer insulating film having a second contact hole to the barrier metal film, (4) forming contact plugs only in the first and second contact holes in contact with the barrier metal film, and (5) forming a metal wiring on the second interlayer insulating film in contact with the contact plugs.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 5055423 (1991-10-01), Smith et al.
patent: 5427981 (1995-06-01), Choi
Fourson George
Hyundai Electronics Industries Co,. Ltd.
Morgan & Lewis & Bockius, LLP
Pham Thanh V
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