Static information storage and retrieval – Read/write circuit – Having fuse element
Reexamination Certificate
2000-04-28
2002-05-28
Elms, Richard (Department: 2824)
Static information storage and retrieval
Read/write circuit
Having fuse element
C365S201000
Reexamination Certificate
active
06396759
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to fabrication of semiconductor integrated circuits.
DESCRIPTION OF THE RELATED ART
In an application in which trimming of precise circuit characteristics is necessary, fuse links are commonly placed on integrated circuit (IC) chips. A pre-determined algorithm based upon the circuit's behavior under nominal processing conditions is used to determine the appropriate fuse links to be “blown” or opened to adjust the circuit parameters accordingly.
For example, U.S. Pat. No. 5,991,220 to Freyman et al., which is expressly incorporated by reference herein in it entirety, describes an apparatus for selectively controlling a plurality of fuses associated with an IC. Each fuse is switchable from a closed state to an open state. The apparatus has a data register including an array of internal registers. Each of the internal registers is coupled with one of the fuses. Each internal register is identified by an address and is separately addressable. An instruction register contains instructions for determining whether the fuses are to assume the opened state or the closed state. A controller connects the data register and the instruction register. The controller combines with the data register to cause the fuses associated with the internal registers to assume the states determined by the instruction register.
The predetermined trim algorithm works well under ideal conditions. However, in a real production environment, the circuit behavior may differ greatly from the nominal process upon which the trim algorithm is based. The net result is that over large populations of devices, the tolerances of parameters which depend upon fuse link trimming are influenced not only by the resolution of the finest trim step, but also by the tracking of the expected trim algorithm to the actual component behavior This method can also negatively effect product yield if the incorrect fuse links are chosen for a particular device. In the case of traditional metal fuse links, where the fuse is blown by passing a large current, once the fuse is blown, there is no chance to correct for an improper decision.
SUMMARY OF THE INVENTION
One aspect of the present invention is a test function for an integrated circuit including a circuit that is capable of being trimmed. A storage device provides a test output signal. A switch selects either the output signal of the fuse link or the test output signal, and outputs the selected signal to the circuit to be trimmed.
Another aspect of the invention is a method for trimming a circuit on an integrated circuit (IC) chip, including at least one fuse link having a fuse. The method includes testing the circuit to be trimmed, to obtain first test results with the fuse intact. A test circuit on the IC is enabled. The test circuit provides substantially the same input to the circuit as provided by a linked circuit that is formed if the fuse is blown. The circuit is tested to obtain second test results with the test circuit enabled the first and second test results are compared to predetermined desired values. The fuse is blown, if the second test results are closer to the desired values than the first test results.
REFERENCES:
patent: 5396130 (1995-03-01), Galbraith et al.
patent: 5412594 (1995-05-01), Moyal et al.
patent: 5838076 (1998-11-01), Zarrabian et al.
patent: 5973977 (1999-10-01), Boyd et al.
patent: 5991220 (1999-11-01), Freyman et al.
patent: 6006169 (1999-12-01), Sandhu et al.
patent: 6041007 (2000-03-01), Roeckner
patent: 6108804 (2000-08-01), Derner
Agere Systems Guardian Corp.
Duane Morris & Heckscher LLP
Elms Richard
Koffs Steven E.
Phung Anh
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