MRAM device including offset conductors

Details MRAM device including offset conductors MRAM device including offset conductors

2001-08-01

2002-05-07

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Magnetic thin film

C365S173000, C365S063000

Reexamination Certificate

active

06385083

ABSTRACT:

BACKGROUND
The present invention relates to data storage. More specifically, the present invention relates to magnetic random access memory (MRAM).
MRAM is a non-volatile memory that is being considered for short-term and long-term data storage. MRAM has lower power consumption than short-term memory such as DRAM, SRAM and Flash memory. MRAM can perform read and write operations much faster (by orders of magnitude) than conventional long-term storage devices such as hard drives. In addition, MRAM is more compact and consumes less power than hard drives. MRAM is also being considered for embedded applications such as extremely fast processors and network appliances.
A typical MRAM device includes an array of memory cells, word lines extending along rows of the memory cells, and bit lines extending along columns of the memory cells. Each memory cell is located at a cross point of a word line and a bit line.
The memory cells may be based on magneto-resistive devices such as tunneling magneto-resistive (TMR) devices or giant magneto-resistive (GMR) devices. A typical TMR device includes a pinned layer, a sense layer and an insulating tunnel barrier sandwiched between the pinned and sense layers. The pinned layer has a magnetization orientation that is fixed so as not to rotate in the presence of an applied magnetic field in a range of interest. The sense layer has a magnetization that can be oriented in either of two directions: the same direction as the pinned layer magnetization or the opposite direction of the pinned layer magnetization. If the magnetizations of the pinned and sense layers are in the same direction, the orientation of the TMR device is said to be “parallel.” If the magnetizations of the pinned and sense layers are in opposite directions, the orientation of the TMR device is said to be “anti-parallel.” These two stable orientations, parallel and anti-parallel, may correspond to logic values of ‘0’ and ‘1.’
A GMR device has the same basic configuration as a TMR device, except that the data and reference layers are separated by a conductive non-magnetic metallic layer instead of an insulating tunnel barrier. The relative magnetization orientations of the sense and pinned layers affect in-plane resistance of a GMR device operated in a current-in-plane (CIP) geometry, and similarly affect the perpendicular-to-plane resistance of a GMR device operated in a current-perpendicular-to-plane (CPP) geometry.
Density of the memory cells is limited by the in-plane distance between lines. The maximum current that can be driven through the lines is limited by the current density of the lines. These two parameters—line separation and current density—limit the maximum switching fields that can be applied to the sense layers of the magneto-resistive devices.
It would be desirable to increase the maximum switching field that can be applied to the magneto-resistive devices, without reducing memory density. Increasing the maximum magnetic field would allow the coercivity of the memory cells to be increased. Increasing the coercivity, in turn, would increase the integrity of writing data to the memory cells, and it would reduce the undesired side effect of unselected bit erasure. Otherwise, correcting such erasures can increase the burden on error code correction.
SUMMARY
According to one aspect of the present invention, a data storage device includes an array of magnetic memory cells; and a plurality of first conductors on one side of the memory cell array. The first conductors extend in a first direction. The first conductors are offset in a second direction from at least some of the memory cells. The first and second directions are orthogonal.


REFERENCES:
patent: 6104632 (2000-08-01), Nishimura

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