Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral configuration
Reexamination Certificate
1999-04-30
2002-01-08
Lee, Thomas (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral configuration
C711S170000, C711S218000
Reexamination Certificate
active
06338101
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an I/O subsystem and the exclusive control method, data storage method and memory initialization method in the I/O subsystem.
2. Description of the Related Art
A recent large computer system which has increasingly enlarged the scale is generally composed of a plurality of central processing units (CPUs). In such a system, common use of data and communication of data among a plurality of CPUs are necessary. For this purpose, I/O device subsystem including an external storage unit is required to be provided with a multiplicity of host interfaces.
To meet this demand, the I/O subsystem is provided with a multiplicity of input/output controllers (CAs: Channel Adapters) having a plurality of input/output interfaces which are connected to host CPUs. In order to exclusively control the accesses from a plurality of CPUs, the I/O subsystem is provided with an exclusive control manager (RM: Resource Manager) having an exclusive control table.
FIG. 1
shows the structure of a semiconductor disk apparatus as such an I/O subsystem. In
FIG. 1
, the reference numerals
1
a
,
1
b
each represent a CPU,
2
a semiconductor disk controller, and
3
a semiconductor disk having a plurality of semiconductor memory modules
3
a
,
3
b
,
3
c
, . . . The semiconductor disk apparatus has the same structure (command code, data transfer method, etc.) as that of a magnetic disk apparatus except that the magnetic disk as the recording medium is replaced by a semiconductor memory. Therefore, the interface between the CPU
1
a
(
1
b
) and the semiconductor disk controller
2
is completely the same as the interface between the CPU
1
a
(
1
b
) and a magnetic disk controller. This semiconductor disk apparatus is advantageous in that instant access is possible because the movement of the head, which is necessary in a magnetic disk, is not necessary, and in that the software resources between the CPU and the magnetic disk controller are usable as they are.
In the semiconductor disk controller
2
, the reference numerals
2
a
and
2
b
each represent a channel adapter CA having a single or a plurality of interfaces (host interfaces) to and from a host apparatus (CPU), numerals
2
c
and
2
d
each a memory interface adapter for controlling the operation of writing/reading data into and from the semiconductor disk
3
, numeral
2
e
represents a resource manager RM having an exclusive control table ECT and-executing exclusive control for permitting a host interface to use the semiconductor module
3
a
(
3
b
or
3
c
) when another host interface is not using it, while prohibiting the use when another host interface is using it. Exclusive control is executed in each semiconductor memory module.
Two physical interfaces (physical ports)
2
a
0
,
2
a
1
(
2
b
0
,
2
b
1
) are provided between the channel adapter
2
a
(
2
b
) and the CPU
1
a
(
1
b
). The exclusive control table ECT of the resource manager
2
e
records whether or not each of the semiconductor memory modules
3
a
,
3
b
,
3
c
(device numbers
0
to
2
) is occupied by each combination (path) of a channel adapter (channel number) and a physical interface mounted on each channel adapter, as shown in FIG.
2
. There are four types of paths, i.e., (00), (01), (10) and (11) in the semiconductor disc controller
2
.
In this I/O subsystem, if a command for access to the semiconductor memory module
3
b
is issued from the CPU
1
b
to the channel adapter
2
b
through the physical interface
2
b
1
, for example, the channel adapter
2
b
requests the resource manager
2
e
to permit the use of the semiconductor module
3
b
. When the resource manager
2
e
receives the request for use, it judges whether or not the semiconductor memory module
3
b
is being used through another path by reference to the exclusive control table ECT. If the answer is YES, the resource manager
2
e
does not permit the channel adapter
2
b
to use it. On the other hand, if the answer is NO, the resource manager
2
e
permits the channel adapter
2
b
to use it, and sets a flag indicating “Occupied” in the field of the semiconductor memory module
3
b
in correspondence with the path (
11
). The channel adapter
2
b
which is permitted to use the semiconductor memory module
3
b
then receives data from the CPU
1
b
through the physical interface
2
b
1
, and writes the data into the semiconductor memory module
3
b
through the memory interface adapter
2
d
. When the writing operation is finished, the resource manager
2
e
changes the flag indicating “Occupied” to a flag indicating “Vacant” in correspondence with the path (
11
).
Problem in Exclusive Control
As described above, in the conventional I/O subsystem, a table region on the exclusive control table ECT is pre-allotted for each of the channel adapters in the I/O subsystem. For this reason, if the number of channel adapters accommodated in the I/O subsystem is increased and the number of physical interfaces in each channel adapter is increased, the size of the exclusive control is enlarged.
With the recent development and change of data transmitting technique, many kinds of interface systems (e.g., electric interface system, optical interface system and OC link) coexist. In this situation, in order to enable an I/O subsystem to be connected to as many CPUs as possible, it is necessary to correspond to all of the existing interface systems. In other words, it is necessary to provide various types of channel adapters in the I/O subsystem in order to correspond to every interface system and, as a result, the number of channel adapters therefore increases. In addition, since not only the physical data transfer means but also the number of physical interfaces which can be provided in one channel adapter are different in interface systems. Therefore, the exclusive control table is further enlarged.
If a plurality of logical interfaces are defined on one physical interface, the exclusive control table must be produced while taking each logical interface into consideration.
FIG. 3
is an explanatory view of an OC link interface system. In
FIG. 3
, the reference numeral
4
a
represents a channel adapter for OC link, and
4
b
an OC link change-over/repeater provided between a CPU
4
ci
(i=1, 2, . . . ) and the I/O subsystem so as to dynamically switch the interface. It is possible to define 256 CPUs at its maximum on one physical interface through the OC link change-over/repeater. When a plurality of logical interfaces are defined on one physical interface in this way, it is necessary to produce the exclusive control table ECT while dealing with each of the logical interfaces as if they were different physical interfaces.
There is a system called a multi-exposure system which enables a multiple access by defining a plurality of I/O device addresses with respect to one I/O device. The multi-exposure system is used as an I/O device access system which is able to simultaneously access a plurality of areas in the I/O device such as a magnetic drum apparatus, a semiconductor disk apparatus and a disk cache through different paths. A computer has an architecture called virtual machines (separate operating systems which are operated independently of each other on a single CPU). When a plurality of such virtual machines (operating systems) are operated, one exposure is allotted to one operating system so as to secure the independence of the I/O device access of each operating system. In this way, when there are a plurality of virtual machines, a plurality of logical interfaces exist on one physical interface. In this case, it is also necessary to produce the exclusive control table ECT while dealing with each of the logical interfaces as if they were different physical interfaces.
FIG. 4
is an explanatory view of a multi-exposure system. It is now assumed that 256 I/O device addresses such as (00)
hex
to (FF)
hex
can be defined on an interface. At this time, the zone bits of an address is assigned to an exposure number. For
Greer, Burns & Crain LTD
Lee Thomas
Perveen Rehana
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