Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2000-04-20
2002-03-26
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S149000, C438S157000, C438S283000, C438S030000, C438S038000, C257S072000, C257S059000, C349S038000, C349S160000
Reexamination Certificate
active
06362030
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Application No. 11-111962, filed Apr. 20, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a method of manufacturing an active-matrix substrate having thin-film transistors used as switching elements.
In recent years, active-matrix liquid crystal displays have been developed, each having many pixels arranged in high density and thin-film transistors used as switching elements. An active matrix substrate having thin-film transistors whose semiconductor layer is made of polysilicon (p-Si) attracts much attention. (Hereinafter, these thin-film transistors will be referred to as “p-Si TFTs.”) This is because polysilicon excels in carrier mobility, exhibiting good semiconductor characteristic. An active-matrix liquid crystal display is being developed, in which p-Si TFTs are used to switch the pixel electrodes and the pixel electrodes and a drive circuit are mounted on the same glass substrate.
The source electrode and drain electrode of a p-Si TFT are usually formed in self-alignment by injecting impurities into a p-Si layer, while using the gate electrode as mask. Thus, the p-Si TFT has a top-gate transistor structure.
In the above-mentioned active-matrix liquid crystal display, auxiliary capacitance must be used to hold a write voltage at pixel electrodes for a predetermined time. To provide the auxiliary capacitor, auxiliary capacitance lines are formed on the active matrix substrate, independently of the gate lines of top-gate type p-Si TFT. The auxiliary capacitance lines extend parallel to the gate lines. The auxiliary capacitance lines and the gate lines have been formed by patterning a metal film.
If the metal film is not patterned as desired to form parallel gate lines and auxiliary capacitance lines, short-circuiting may occur between the gate lines and the auxiliary capacitance lines. Once short-circuiting occurs between gate lines and the auxiliary capacitance lines, it is no longer possible to provide capacitance of a desired value. Consequently, the active-matrix liquid crystal display will make errors in its operation.
In order to pattern the metal film as desired, it is proposed that the metal film be etched twice in the same pattern. If the metal film is etched twice, the number of steps of manufacturing the active-matrix substrate will increase. The manufacturing time and manufacturing cost of the active-matrix substrate will inevitably increase, too.
BRIEF SUMMARY OF THE INVENTION
The present invention has been made to solve the above-mentioned problems with the conventional active-matrix substrate. The object of the invention is to provide a method of manufacturing an active-matrix substrate that serves to display high-quality images, without increasing the manufacturing time or the manufacturing cost.
According to the invention, there is provided a method of manufacturing an active-matrix substrate, comprising: a first step of forming a semiconductor layer on an insulating substrate, the semiconductor layer having a specific shape; a second step of forming a gate insulating film on the semiconductor layer; a third step of forming a metal film on the gate insulating film; a fourth step of making openings in a first area and second area of the metal film, the first area overlapping the semiconductor layer and the second area not overlapping the semiconductor layer; a fifth step of injecting impurities into the semiconductor layer through the openings made in the first area of the metal film, thereby forming a source region and a drain region in the semiconductor layer; and a sixth step of removing some parts of the metal film, including the second area having the openings, thereby forming gate lines and auxiliary capacitance lines.
In the method, any area of the metal film, which lies between one gate line and one auxiliary capacitance line, is etched twice without increasing the number of steps of manufacturing the active-matrix substrate. Hence, the gate lines and the auxiliary capacitance lines can be patterned as desired. The probability of short-circuiting between any gate line and the adjacent auxiliary capacitance line is therefore low. This helps enhance the manufacturing yield of the active-matrix substrate of high quality.
Additional objects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The objects and advantages of the invention may be realized and obtained by means of the instrumentalities and combinations particularly pointed out hereinafter.
REFERENCES:
patent: 5032536 (1991-07-01), Oritsuki
patent: 5757444 (1998-05-01), Takemura
patent: 6108056 (2000-08-01), Nakajima et al.
patent: 6235561 (2001-05-01), Seiki et al.
patent: 6262438 (2001-07-01), Yamazaki
Hanazawa Yasuyuki
Nagayama Kohei
Kabushiki Kaisha Toshiba
Keshavan B. V.
Pillsbury & Winthrop
Smith Matthew
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