Electronic digital logic circuitry – Interface – Supply voltage level shifting
Reexamination Certificate
2000-08-30
2002-05-14
Lam, Tuan T. (Department: 2816)
Electronic digital logic circuitry
Interface
Supply voltage level shifting
C327S333000, C327S110000
Reexamination Certificate
active
06388468
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) control circuits.
BACKGROUND OF THE INVENTION
Most modern vehicles are equipped with an electrical supply which provides an operating voltage range between 8 volts and 14 volts. Typically, the power supply is a conventional vehicle battery which provides a standard system operating voltage of 12 volts.
To meet a demand for increased power, future vehicles will include a power supply which provides a higher system operating voltage range. One such high system operating voltage range is 25 volts to 55 volts with a standard system operating voltage of 42 volts.
For safety and reliability purposes, electrical systems are normally designed with a safety coefficient (e.g. 1.3-1.5). Thus, electrical components receiving a high system operating voltage range, having a maximum system operating voltage of 55 volts, must be capable of handling at least 72 volts (i.e. 55 volts×1.3-72 volts). Existing MOSFET control circuits cannot operate properly in a vehicle having a high system operating voltage range. Accordingly, it would be desirable to provide a circuit and method for operating a MOSFET control circuit, having a maximum supply voltage limit, with a system operating voltage greater than the maximum supply voltage limit.
SUMMARY OF THE INVENTION
The present invention provides a circuit for operating a MOSFET control circuit, having a maximum supply voltage limit, with a system operating voltage greater than the maximum supply voltage limit. A system operating voltage is referenced to a first ground. The MOSFET control circuit has a power supply input for receiving the system operating voltage and for generating a signal having a maximum voltage level and a minimum voltage level. A ground floating circuit includes a second ground, having a greater potential than the first ground, for establishing a voltage difference between the MOSFET control circuit power supply input and the second ground. The voltage difference is less than the maximum supply voltage limit. In one embodiment of the present invention, a first signal level shifting circuit shifts one of the maximum voltage level and the minimum voltage level of the signal from a first reference voltage to a second reference voltage. In another embodiment of the present invention, the first signal level shifting circuit receives the signal having the minimum voltage level referenced to a first reference voltage and produces a MOSFET activation signal having a minimum voltage level referenced to a second reference voltage.
The present invention also provides a method for operating a MOSFET control circuit, having a maximum supply voltage limit, with a system operating voltage greater than the maximum supply voltage limit. The system operating voltage is referenced to a first ground. The method provides a MOSFET control circuit having a power supply input for receiving the system operating voltage and for generating a signal having a maximum voltage level and a minimum voltage level; establishes a voltage difference with a ground floating circuit including a second ground, having a greater potential than the first ground, between the MOSFET control circuit power supply input and the second ground, the voltage difference being less than the maximum supply voltage limit; and shifts one of the maximum voltage level and the minimum voltage level of the signal from a first reference voltage to a second reference voltage with a first signal level shifting control.
Other features, advantages and applications of the present invention will become apparent to those skilled in the art when the following description of the best mode contemplated for practicing the invention is read in conjunction with the accompanying drawings.
REFERENCES:
patent: 4841166 (1989-06-01), Harnden
patent: 5514981 (1996-05-01), Tam et al.
patent: 5543740 (1996-08-01), Wong
patent: 5909135 (1999-06-01), Baldwin et al.
patent: 5977811 (1999-11-01), Magazzu
patent: 6107860 (2000-08-01), Vinciarelli
patent: 6211706 (2001-04-01), Choi et al.
patent: 6218788 (2001-04-01), Chen et al.
Lam Tuan T.
Yazaki North America
Young & Basile
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