Direct synthesis clock generation circuits and methods

Details Direct synthesis clock generation circuits and methods Direct synthesis clock generation circuits and methods

2008-06-24

2008-06-24

Wang, Ted (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S373000, C375S327000, C341S110000, C341S144000, C341S147000

Reexamination Certificate

active

07391842

ABSTRACT:
Clock signal generation circuitry includes input circuitry for receiving a frequency control input signal and a clock signal and generating a memory address therefrom, a memory for storing digital data indexed by the memory address and representing real and imaginary parts of a complex digital waveform, and digital to analog conversion circuitry. The digital to analog conversion circuitry includes real-part digital to analog conversion circuitry for converting digital data retrieved from the memory and representing the real part of the complex waveform into a real-part analog signal and imaginary-part digital to analog conversion circuitry for converting digital data retrieved from the memory and representing the imaginary part of the complex waveform into an imaginary-part analog signal. The clock signal generation circuitry also includes analog filtering circuitry having real-part filtering circuitry for filtering the real-part analog signal to generate a filtered real-part analog signal and imaginary-part filtering circuitry for filtering the imaginary-part analog signal to generate a filtered imaginary-part analog signal. Analog to digital conversion circuitry is provided for converting the filtered real-part and imaginary-part analog signals into a digital clock signal at a rate near an integer multiple of a frequency of the filtered real-part and imaginary-part analog signals.

REFERENCES:
patent: 5563535 (1996-10-01), Corry et al.
patent: 6150969 (2000-11-01), Melanson
patent: WO 31881 (2000-06-01), None

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