Cache flushing

Details Cache flushing Cache flushing

2008-05-27

2008-05-27

Tran, Denise (Department: 2185)

Electrical computers and digital processing systems: memory

Storage accessing and control

Hierarchical memories

C711S135000, C710S262000, C713S323000, C713S324000

Reexamination Certificate

active

07380063

ABSTRACT:
Portions of a cache are flushed in stages. An exemplary flushing of the present invention comprises flushing a first portion, performing operations other than a flush, and then flushing a second portion of the cache. The first portion may be disabled after it is flushed. The cache may be functionally divided into portions prior to a flush, or the portions may be determined in part by an abort signal. The operations may access either the cache or the memory. The operations may involve direct memory access or interrupt servicing.

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