Non-volatile memory and manufacturing method thereof

Details Non-volatile memory and manufacturing method thereof Non-volatile memory and manufacturing method thereof

2008-07-01

2008-07-01

Prenty, Mark (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S321000, C438S259000

Reexamination Certificate

active

07394126

ABSTRACT:
A non-volatile memory is described, including a substrate, a floating gate, a control gate, a source region, and a drain region. A trench is disposed in the substrate, and a step-like recess is located in the substrate beside the trench. The floating gate is disposed on the sidewall of the trench. The control gate is disposed on the substrate between the trench and the step-like recess which extends in the step-like recess. The source region is disposed in the substrate at the bottom of the trench. The drain region is disposed in the substrate at the bottom of the step-like recess.

REFERENCES:
patent: 6800526 (2004-10-01), Lin et al.
patent: 6815758 (2004-11-01), Chang et al.
patent: 6821849 (2004-11-01), Chang et al.
patent: 6894339 (2005-05-01), Fan et al.
patent: 7129536 (2006-10-01), Chen et al.
patent: 2004/0183124 (2004-09-01), Hsu et al.
Article titled “Vertical floating-gate 4.5F2Split-gate NOR Flash Memory at 110nm Node” authored by Lee et al. in Jan. 6, 2004,IEEE.

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