Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-08-23
2011-08-23
Richards, N Drew (Department: 2895)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S351000, C257S369000, C257S392000, C257S406000, C257S408000
Reexamination Certificate
active
08004047
ABSTRACT:
A first gate dielectric of a first transistor is disposed over a workpiece in a first region, and a second gate dielectric of a second transistor is disposed over the workpiece in a second region. The second gate dielectric comprises a different material than the first gate dielectric. A first dopant-bearing metal comprising a first dopant is disposed in recessed regions of the workpiece proximate the first gate dielectric, and a second dopant-bearing metal comprising a second dopant is disposed in recessed regions of the workpiece proximate the second gate dielectric. A first doped region comprising the first dopant is disposed in the workpiece adjacent the first dopant-bearing metal. A second doped region comprising the second dopant is disposed in the workpiece adjacent the second dopant-bearing metal. The dopant-bearing metals and the doped regions comprise source and drain regions of the first and second transistors.
REFERENCES:
patent: 4432035 (1984-02-01), Hsieh et al.
patent: 4990974 (1991-02-01), Vinal
patent: 5041885 (1991-08-01), Gualandris et al.
patent: 5066995 (1991-11-01), Young et al.
patent: 5162263 (1992-11-01), Kunishima et al.
patent: 5321287 (1994-06-01), Uemura et al.
patent: 5352631 (1994-10-01), Sitaram et al.
patent: 5763922 (1998-06-01), Chau
patent: 5994747 (1999-11-01), Wu
patent: 6020243 (2000-02-01), Wallace et al.
patent: 6027961 (2000-02-01), Maiti et al.
patent: 6033944 (2000-03-01), Shida
patent: 6048769 (2000-04-01), Chau
patent: 6084280 (2000-07-01), Gardner et al.
patent: 6124171 (2000-09-01), Arghavani et al.
patent: 6159782 (2000-12-01), Xiang et al.
patent: 6171910 (2001-01-01), Hobbs et al.
patent: 6184072 (2001-02-01), Kaushik et al.
patent: 6225163 (2001-05-01), Bergemont
patent: 6291867 (2001-09-01), Wallace et al.
patent: 6348390 (2002-02-01), Wu
patent: 6373111 (2002-04-01), Zheng et al.
patent: 6410967 (2002-06-01), Hause et al.
patent: 6444555 (2002-09-01), Ibok
patent: 6448127 (2002-09-01), Xiang et al.
patent: 6475908 (2002-11-01), Lin et al.
patent: 6492217 (2002-12-01), Bai et al.
patent: 6528858 (2003-03-01), Yu et al.
patent: 6563183 (2003-05-01), En et al.
patent: 6656764 (2003-12-01), Wang et al.
patent: 6693333 (2004-02-01), Yu
patent: 6716685 (2004-04-01), Lahaug
patent: 6720221 (2004-04-01), Ahn et al.
patent: 6737313 (2004-05-01), Marsh et al.
patent: 6740944 (2004-05-01), McElheny et al.
patent: 6852645 (2005-02-01), Colombo et al.
patent: 6855605 (2005-02-01), Jurczak et al.
patent: 6890807 (2005-05-01), Chau et al.
patent: 6897095 (2005-05-01), Adetutu et al.
patent: 6921691 (2005-07-01), Li et al.
patent: 7060568 (2006-06-01), Metz et al.
patent: 7091568 (2006-08-01), Hegde et al.
patent: 7344934 (2008-03-01), Li
patent: 7348284 (2008-03-01), Doyle et al.
patent: 7361958 (2008-04-01), Brask et al.
patent: 7592678 (2009-09-01), Li
patent: 2001/0012653 (2001-08-01), Tsukamoto
patent: 2002/0005556 (2002-01-01), Cartier et al.
patent: 2002/0053711 (2002-05-01), Chau et al.
patent: 2002/0090773 (2002-07-01), Bojarczuk, Jr. et al.
patent: 2002/0098649 (2002-07-01), Chien et al.
patent: 2002/0099766 (2002-07-01), Tuli
patent: 2002/0135030 (2002-09-01), Horikawa
patent: 2002/0135048 (2002-09-01), Ahn et al.
patent: 2002/0151125 (2002-10-01), Kim et al.
patent: 2002/0153573 (2002-10-01), Mogami
patent: 2003/0057432 (2003-03-01), Gardner et al.
patent: 2003/0099766 (2003-05-01), Jurczak et al.
patent: 2003/0104663 (2003-06-01), Visokay et al.
patent: 2003/0116804 (2003-06-01), Visokay et al.
patent: 2003/0137017 (2003-07-01), Hisamoto et al.
patent: 2003/0141560 (2003-07-01), Sun
patent: 2003/0203560 (2003-10-01), Ryu et al.
patent: 2003/0219953 (2003-11-01), Mayuzumi
patent: 2004/0000695 (2004-01-01), Matsuo
patent: 2004/0005749 (2004-01-01), Choi et al.
patent: 2004/0009675 (2004-01-01), Eissa et al.
patent: 2004/0023462 (2004-02-01), Rotondaro et al.
patent: 2004/0029321 (2004-02-01), Ang et al.
patent: 2004/0132271 (2004-07-01), Ang et al.
patent: 2004/0171222 (2004-09-01), Gao et al.
patent: 2004/0180487 (2004-09-01), Eppich et al.
patent: 2004/0217429 (2004-11-01), Lin et al.
patent: 2004/0242021 (2004-12-01), Kraus et al.
patent: 2005/0035345 (2005-02-01), Lin et al.
patent: 2005/0064663 (2005-03-01), Saito
patent: 2005/0098839 (2005-05-01), Lee et al.
patent: 2005/0101159 (2005-05-01), Droopad
patent: 2005/0139926 (2005-06-01), Shimizu et al.
patent: 2005/0224897 (2005-10-01), Chen et al.
patent: 2005/0245019 (2005-11-01), Luo et al.
patent: 2005/0280104 (2005-12-01), Li
patent: 2005/0282329 (2005-12-01), Li
patent: 2006/0003507 (2006-01-01), Jung et al.
patent: 2006/0017112 (2006-01-01), Wang et al.
patent: 2006/0038236 (2006-02-01), Yamamoto
patent: 2006/0118879 (2006-06-01), Li
patent: 2006/0125018 (2006-06-01), Lee et al.
patent: 2006/0131652 (2006-06-01), Li
patent: 2006/0141729 (2006-06-01), Wang et al.
patent: 2006/0211195 (2006-09-01), Luan
patent: 2006/0223335 (2006-10-01), Mathew et al.
patent: 2006/0275975 (2006-12-01), Yeh et al.
patent: 2006/0292773 (2006-12-01), Goolsby et al.
patent: 2007/0018245 (2007-01-01), Jeng
patent: 2007/0020903 (2007-01-01), Takehara et al.
patent: 2007/0034945 (2007-02-01), Bohr et al.
patent: 2007/0176242 (2007-08-01), Lee et al.
patent: 2008/0116523 (2008-05-01), Li
patent: 2008/0233694 (2008-09-01), Li
patent: 10 2005 024 417 (2006-02-01), None
patent: 1 298 722 (2003-04-01), None
patent: 1 388 889 (2004-02-01), None
patent: 1 531 496 (2005-05-01), None
patent: 2002118175 (2002-04-01), None
patent: 2004289061 (2004-10-01), None
patent: WO 01/66832 (2001-09-01), None
patent: WO 2004/095556 (2004-11-01), None
patent: WO 2005/114718 (2005-12-01), None
patent: WO 2006/061371 (2006-06-01), None
patent: WO 2006/067107 (2006-06-01), None
Muller, R.S., et al., “Device Electronics for Integrated Circuits,” Second Ed., 1986, pp. 380-385, 398-399, John Wiley & Sons, New York, NY.
Wolf, S., “Silicon Processing for the VLSI Era: vol. II—CMOS Process Integration,” 1990, pp. 432-441, Lattice Press, Sunset Beach, CA.
Huang, F.-J., et al., “Schottky-Clamped NMOS Transistors Implemented in a Conventional 0.8-μm CMOS Process,” IEEE Electron Device Letters, Sep. 1998, pp. 326-328, vol. 19, No. 9, IEEE, Los Alamitos, CA.
Polishchuk, I., et al., “Polycrystalline Silicon/Metal Stacked Gate for Threshold Voltage Control in Metal-Oxide-Semiconductor Field-Effect Transistors,” Applied Physics Letters, Apr. 3, 2000, pp. 1938-1940, vol. 76, No. 14, 2000 American Institute of Physics.
Gannavaram, S. et al., “Low temperature (≦ 800° C) Recessed Junction Selective Silicon-Germanium Source/Drain Technology for sub-70 nm CMOS,” 2000, 4 pp., IEEE, Los Alamitos, CA.
Guha, S., et al., “Atomic Beam Deposition of Lanthanum- and Yttrium-Based Oxide Thin Films for Gate Dielectrics,” Applied Physics Letters, Oct. 23, 2000, pp. 2710-2712, vol. 77, No. 17, American Institute of Physics, Melville, NY.
Yeo, Y.C., et al, “Dual-Metal Gate CMOS Technology with Ultrathin Silicon Nitride Gate Dielectric,” IEEE Electron Device Letters, May 2001, pp. 227-229, vol. 22, Issue 5.
Wakabayashi, H., et al., “A Dual-Metal Gate CMOS Technology Using Nitrogen-Concentration-Controlled TiNx Film,” IEEE Transactions on Electron Devices, Oct. 2001, pp. 2363-2369, vol. 48, No. 10, IEEE, Los Alamitos, CA.
Polishchuk, I., et al., “Dual Work Function Metal Gate CMOS Transistors Fabricated by Ni-Ti Interdiffusion,” IEEE Electron Device Letters, Apr. 2002, pp. 411-414, vol. 23, Issue 4.
Samavedam, S.B., et al., “Evaluation of Candidate Metals for Dual-Metal Gate CMOS with HfO2Gate Dielectric,” Materials Research Society Symposium, 2002, pp. 85-90, vol. 716, Materials Research Society.
“Front End Processes,” The International Technology Roadmap for Semiconductors: 2002 Update, pp. 45-62, http://member.itrs.net/.
Lin, R., et al., “An Adjustable Work Function Technology Using Mo Gate for CMOS Devices,” IEEE Electron Device Letters, Jan. 2002, pp. 49-
Infineon - Technologies AG
Lee Kyoung
Richards N Drew
Slater & Matsil L.L.P.
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