Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation
Reexamination Certificate
2008-07-29
2008-07-29
Knoll, Clifford H (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus access regulation
C710S306000, C710S305000
Reexamination Certificate
active
07406553
ABSTRACT:
Systems and methods for early fixed latency subtractive decoding are disclosed. The subtractive decoding device speculatively acknowledges a bus transaction within a fixed time period that is the same as the time period for positive decoding. Pipelining of a new bus transaction may therefore be accomplished each new time period. A bus transaction may be retried if no acknowledgement occurs within the fixed time period.
REFERENCES:
patent: 4110823 (1978-08-01), Cronshaw et al.
patent: 5715411 (1998-02-01), Verdun
patent: 5748918 (1998-05-01), Cho et al.
patent: 5864688 (1999-01-01), Santos et al.
patent: 5892931 (1999-04-01), Cohen et al.
patent: 5935226 (1999-08-01), Klein
patent: 5968151 (1999-10-01), Williams
patent: 5987244 (1999-11-01), Kau et al.
patent: 6032210 (2000-02-01), Downey
patent: 6076128 (2000-06-01), Kamijo et al.
patent: 6088753 (2000-07-01), Sheafor et al.
patent: 6112273 (2000-08-01), Kau et al.
patent: 6421754 (2002-07-01), Kau et al.
patent: 7219176 (2007-05-01), Edirisooriya et al.
patent: 2004/0064616 (2004-04-01), Edirisooriya et al.
patent: 2005/0060468 (2005-03-01), Emerson et al.
patent: 2007/0162672 (2007-07-01), Edirisooriya et al.
patent: 2007/0186019 (2007-08-01), Edirisooriya et al.
“Enhanced differentially coherent subtractive interferene cancellation receivers with multiple symbol differential detection” by Correl et al. (abstract only) Publication Date: Jun. 18-22, 2000.
Deal, W., “An Experimental Automatic Communication System for Air Traffic Control,” (abstract only) publication date: Jun. 1959.
Intel Corporation, 21050 PCI-to-PCI Bridge Configuration, Application Note, Order No. 278033-001, Table of Contents and p. 10, Aug. 1998.
Intel Corporation, 21154 PCI-to-PCT Bridge Configuration, Application Note, Order No. 278080-001, Table of Contents and p. 10, Oct. 1998.
Müller, Hans, “The Peripheral Component Interconnect: PCT local bus by Intel became the de facto local bus of computer industry and of future High Energy Physics Experiments,” CERN/ECP-ED0 RD24 Project, Presentation at CERN ECP, Feb. 23, 1998.
Edirisooriya Samantha J.
Jamil Sujat
Miner David E.
Nguyen Hang T.
O'Bleness R. Frank
Knoll Clifford H
Marvell International Ltd.
LandOfFree
System and apparatus for early fixed latency subtractive... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System and apparatus for early fixed latency subtractive..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and apparatus for early fixed latency subtractive... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2794037