Refresh control circuit and method for performing a...

Details Refresh control circuit and method for performing a... Refresh control circuit and method for performing a...

2008-01-29

2008-01-29

Hoang, Huan (Department: 2827)

Static information storage and retrieval

Read/write circuit

Data refresh

C365S230060, C365S230030

Reexamination Certificate

active

07324399

ABSTRACT:
A refresh control circuit and semiconductor devices that may include an address counter for generating a counting address, a repetition address selector for generating a repetition address, a repetition refresh controller for generating a refresh repetition signal based on the counting address and repetition address, and a row decoder for selecting a row of a memory bank based on the counting address and the refresh repetition signal. A method for performing a refresh operation on a semiconductor device that may include receiving a refresh trigger, generating a counting address, generating a repetition address corresponding to a row having a degraded memory cell, providing a refresh repetition signal based on a comparison of the counting address and repetition address, and selecting a row to be refreshed based on one or more of the counting address, repetition address, and the refresh repetition address.

REFERENCES:
patent: 6122214 (2000-09-01), Fujimoto et al.
patent: 2004/0130958 (2004-07-01), Takahashi et al.
patent: 4034794 (1992-02-01), None
patent: 5-266658 (1993-10-01), None
patent: 10-2000-0052491 (2000-08-01), None
patent: 02082454 (2002-10-01), None
Korean Office Action (with English translation) dated Jun. 27, 2006.

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