ROM-based controller monitor in a memory device

Details ROM-based controller monitor in a memory device ROM-based controller monitor in a memory device

2008-01-08

2008-01-08

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Memory testing

C714S731000, C714S718000, C714S005110, C714S030000, C714S042000, C365S201000

Reexamination Certificate

active

07318181

ABSTRACT:
A circuit to monitor the activity of a memory device during program/erase operations that are managed by a ROM-based microcontroller. Different signals can be monitored according to different test modes. The ROM-based microcontroller is triggered by a clock that can be connected to an internal fixed frequency oscillator or to an external clock source for which the frequency can be varied from 0 Hz to any frequency required by the application. The circuit outputs state machine status data, read only memory addresses, and memory status information in a series of multiplexing operations to provide a tester with the ability to determine the state of a memory device during various memory operations.

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