Power efficiency in microprocessors using reduction of...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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C713S300000

Reexamination Certificate

active

07353411

ABSTRACT:
A method of reducing the power consumption of microprocessor system is provided, wherein: said microprocessor system comprises a microprocessor (2) and a memory (4) connected by a bus (6); said memory (4) contains a plurality of data values, each represented by a number of bits, for transmission to said microprocessor (2) via the bus (6); and at least some of said data values contain unused bits; and wherein said method includes assigning values to said unused bits in such a way as to reduce the Hamming distance between successive data values by a greater extent than setting all of said unused bits to an arbitrary predetermined value.

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patent: 6002878 (1999-12-01), Gehman et al.
patent: 6725450 (2004-04-01), Takayama
patent: 0 926 596 (1999-06-01), None
Givargis T et al: “Interface exploration for reduced poser in core-based systems” System Synthesis, 1998. Proceedings, 11THInternational Symposium on Hsinchu, Taiwan Dec. 2-4, 1998 Los Alamitos, CA, USA, IEEE Comput Soc. US, p. 118, left col. see “don't care padding” (Dec. 2, 1998).
Doehle L et al: “Non-Redundant Instruction Format for Interpretive Programming Languages” IBM Technical Disclosure Bulletin IBM Corp., New York, US vol. 17, No. 8, whole doc (Jan. 1975).

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