Self-aligned cross point resistor memory array

Details Self-aligned cross point resistor memory array Self-aligned cross point resistor memory array

2008-01-29

2008-01-29

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Having magnetic or ferroelectric component

C438S128000, C438S508000, C438S508000, C257SE21663, C257SE21665, C257SE27002, C257SE27067, C257SE27075, C257SE27077, C257SE27078, C257SE27084, C257SE27085, C257SE27104

Reexamination Certificate

active

07323349

ABSTRACT:
A method of fabricating resistor memory array includes preparing a silicon substrate; depositing a bottom electrode, a sacrificial layer, and a hard mask layer on a substrate P+ layer; masking, patterning and etching to remove, in a first direction, a portion of the hard mask, the sacrificial material, the bottom electrode; depositing a layer of silicon oxide; masking, patterning and etching to remove, in a second direction perpendicular to the first direction, a portion of the hard mask, the sacrificial material, the bottom electrode;, and over etching to an N+ layer and at least 100 nm of the silicon substrate; depositing of a layer of silicon oxide; etching to remove any remaining hard mask and any remaining sacrificial material; depositing a layer of CMR material; depositing a top electrode; applying photoresist, patterning the photoresist and etching the top electrode; and incorporating the memory array into an integrated circuit.

REFERENCES:
patent: 6531371 (2003-03-01), Hsu et al.
patent: 6693821 (2004-02-01), Hsu et al.
patent: 2003/0142578 (2003-07-01), Hsu et al.
patent: 2004/0063274 (2004-04-01), Hsu et al.
Liu et al.,Electric-pulse induced reversible resistance change effect in magnetoresistive film, Applied Physics Letters, vol. 76, No. 19, p. 2749, May 2000.

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