Self refresh operation of semiconductor memory device

Static information storage and retrieval – Read/write circuit – Data refresh

Reexamination Certificate

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Details

C365S189070, C365S189120, C365S226000, C365S230030, C365S240000

Reexamination Certificate

active

08000164

ABSTRACT:
A method for driving a semiconductor memory device, includes initializing first data corresponding to a refresh time of each corresponding row included in a cell array; storing second data corresponding to column data included in the first row after entering a self refresh mode; setting the first data corresponding to the first row by detecting the refresh time of the first row while performing refresh operations on the other rows in the cell array according to a refresh period selected based on the corresponding first data for predetermined refresh cycles, wherein the refresh operation is not performed on the first row during the predetermined refresh cycles; restoring the second data to the first row; and repeating the above steps for the other rows to thereby set the corresponding first data until the setting step is completed for all rows or the self refresh mode expires.

REFERENCES:
patent: 4357686 (1982-11-01), Scheuneman
patent: 4498155 (1985-02-01), Mohan Rao
patent: 4701843 (1987-10-01), Cohen
patent: 5083296 (1992-01-01), Hara et al.
patent: 5636173 (1997-06-01), Schaefer
patent: 5901101 (1999-05-01), Suzuki et al.
patent: 6246619 (2001-06-01), Ematrudo et al.
patent: 6310814 (2001-10-01), Hampel et al.
patent: 6349068 (2002-02-01), Takemae et al.
patent: 6404688 (2002-06-01), Okuyama et al.
patent: 6412048 (2002-06-01), Chauvel et al.
patent: 6519201 (2003-02-01), Cowles et al.
patent: 6542425 (2003-04-01), Nam
patent: 6597617 (2003-07-01), Ooishi et al.
patent: 6611470 (2003-08-01), Hidaka
patent: 6622197 (2003-09-01), Kim
patent: 6697992 (2004-02-01), Ito et al.
patent: 6721223 (2004-04-01), Matsumoto et al.
patent: 6771553 (2004-08-01), Cowles et al.
patent: 6898141 (2005-05-01), Tsukada
patent: 6898663 (2005-05-01), Winograd et al.
patent: 6965537 (2005-11-01), Klein et al.
patent: 6992943 (2006-01-01), Hwang et al.
patent: 7013363 (2006-03-01), Janzen
patent: 7043599 (2006-05-01), Ware et al.
patent: 7079439 (2006-07-01), Cowles et al.
patent: 7082073 (2006-07-01), Casper
patent: 7120761 (2006-10-01), Matsuzaki et al.
patent: 7158433 (2007-01-01), Riho et al.
patent: 7184352 (2007-02-01), Klein et al.
patent: 7688662 (2010-03-01), Mobley
patent: 2003/0135699 (2003-07-01), Matsuzaki et al.
patent: 2005/0219890 (2005-10-01), Riho et al.
patent: 1536576 (2004-10-01), None
patent: 1995-0021587 (1995-07-01), None
patent: 1997-0051182 (1997-07-01), None
patent: 1999-004795 (1999-07-01), None
patent: 2000-0004872 (2000-01-01), None
patent: 10-2004-0101677 (2004-12-01), None
patent: 2005-0118526 (2005-12-01), None
“Dual-Period Self-Refresh Scheme for Low-Power DRAM's with On-Chip PROM Mode Mode Register” by Youji Idei, et al.;IEEE Journal of Solid-State Circuits, vol. 33, No. 2, Feb. 1998; pp. 253-259.

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