Content addressable memories (CAMs) based on a binary CAM...

Details Content addressable memories (CAMs) based on a binary CAM... Content addressable memories (CAMs) based on a binary CAM...

2008-04-22

2008-04-22

Nguyen, Hiep T. (Department: 2187)

Electrical computers and digital processing systems: memory

Storage accessing and control

Specific memory composition

Reexamination Certificate

active

07363424

ABSTRACT:
Content addressable memories are disclosed that provide at least three states and are based on existing binary CAM devices. A higher order CAM having at least three states comprises a binary CAM having two binary bits; and a logic circuit to configure the two binary bits as a single CAM bit having said at least three states. The three states include a don't care state, a logic 0 state and a logic 1 state. The logic circuit may be embodied as two OR gates. The first match search (MS) input and a first wild card (WC) input of the higher order CAM are applied to inputs of the two OR gates and the outputs of the two OR gates are applied to the wild card (WC) inputs of the binary CAM. The match search (MS) inputs of the binary CAM are tied to a power supply voltage.

REFERENCES:
patent: 6362992 (2002-03-01), Cheng
patent: 6707692 (2004-03-01), Hata et al.
patent: 2003/0081442 (2003-05-01), Tsuda et al.
patent: 2004/0032758 (2004-02-01), Cheng et al.
patent: 2004/0109338 (2004-06-01), Jeung

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