Electrical computers and digital data processing systems: input/ – Intrasystem connection – System configuring
Reexamination Certificate
2011-03-22
2011-03-22
Cleary, Thomas J (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
System configuring
C710S100000
Reexamination Certificate
active
07913006
ABSTRACT:
Systems and methods for improving the performance of a multimedia processor system by dynamically evaluating the current performance of the system and, if necessary, updating the configurations of the individual processors to improve the performance of the system. One embodiment comprises a method implemented in a multiprocessor system, including evaluating the performance of each of a current set of configuration objects installed on the processors, selecting a preferred set of configuration objects, and replacing one or more of the configuration objects in the current set to conform the current set to the preferred set. The method may evaluate the performance of each configuration object according to user preferences and may select preferred configuration objects according to a selectable strategy that can, for example, favor unification or diversity in the types of preferred configuration objects.
REFERENCES:
patent: 5564015 (1996-10-01), Bunnell
patent: 5727208 (1998-03-01), Brown
patent: 5838603 (1998-11-01), Mori
patent: 6427163 (2002-07-01), Arendt
patent: 6748429 (2004-06-01), Talluri
patent: 6988211 (2006-01-01), Cline
patent: 7039692 (2006-05-01), Foster
patent: 7152157 (2006-12-01), Murphy
patent: 7543091 (2009-06-01), Hamaoka et al.
patent: 2002/0024993 (2002-02-01), Subramanian
patent: 2002/0133757 (2002-09-01), Bertram
patent: 2003/0110423 (2003-06-01), Helms
patent: 2003/0120914 (2003-06-01), Axnix
patent: 2003/0229814 (2003-12-01), Garrett
patent: 2004/0049672 (2004-03-01), Nollet
patent: 2004/0177245 (2004-09-01), Murphy
patent: 2005/0005261 (2005-01-01), Severin
patent: 2005/0222969 (2005-10-01), Yip
patent: 2006/0015712 (2006-01-01), Ang
patent: 04-153764 (1992-05-01), None
patent: 8-95484 (1996-04-01), None
patent: 9-81022 (1997-03-01), None
patent: 11-202988 (1999-07-01), None
patent: 2003-337712 (2003-11-01), None
“Computer Organization and Design: The Hardware/Software Interface”. Hennessey & Patterson, Morgan Kaufman Publishers, Inc., 1994, pp. 13-14.
“The American Heritage College Dictionary”. Fourth Edition. 2002. Houghton Mifflini Company. p. 111. ISBN 0-618-19848-8.
“Central processing unit” Wikipedia, the Free Encyclopedia. Online Apr. 28, 2007. http://en.wikipedia.org/Central—processing—unit.
Hamaoka Yoshiyuki
Hayashi Hiroo
Ishibashi Kazuko
Cleary Thomas J
Kabushiki Kaisha Toshiba
Law Offices of Mark L. Berrier
LandOfFree
Self-organized parallel processing system does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Self-organized parallel processing system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-organized parallel processing system will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2741673