Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2011-01-18
2011-01-18
Le, Dieu-Minh (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S042000
Reexamination Certificate
active
07873875
ABSTRACT:
A debugging system includes a CPU that is a debugging target and a debugging circuit. The CPU has an output part configured to independently output stack access information of a stack access and data access information of a data access excluding the stack access, as data access information of the CPU that is monitored by the debugging circuit. The debugging circuit has a trace part configured to independently generate and output trace information of the stack access from the stack access information that is output from the CPU and trace information of the data access excluding the stack access from the data access information that is output from the CPU.
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Fujita Atsushi
Sato Takashi
Fujitsu Patent Center
Fujitsu Semiconductor Limited
Le Dieu-Minh
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