Semiconductor device and method for fabricating the same

Semiconductor device manufacturing: process – Introduction of conductivity modifying dopant into... – Ion implantation of dopant into semiconductor region

Reexamination Certificate

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C438S391000, C257S374000

Reexamination Certificate

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07981783

ABSTRACT:
A semiconductor device including at least one drift region formed near a channel region on a substrate, a first buried insulating layer formed in the drift region, and a first reduced surface field region interposed between the first buried insulating layer and the drift region. Accordingly, the semiconductor device provides first reduced surface field regions arranged between drift regions and first buried insulating layers, thus having advantages of improved junction integrity, suitability for LDMOS transistors employing a high operation voltage and reduced total size.

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patent: 2004/0222488 (2004-11-01), Abadeer et al.
patent: 2008/0067615 (2008-03-01), Kim
patent: 2003-086800 (2003-03-01), None

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