Electronic design automation tool and method for optimizing...

Details Electronic design automation tool and method for optimizing... Electronic design automation tool and method for optimizing...

2011-08-30

2011-08-30

Doan, Nghia (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

System-on-chip design

C716S106000, C716S108000, C716S110000, C716S111000, C716S112000, C716S113000, C716S114000, C716S118000, C716S132000, C716S133000, C716S134000, C716S135000, C716S136000, C714S025000, C714S030000, C714S047100, C714S051000, C714S053000, C703S013000, C703S014000, C327S020000, C327S021000

Reexamination Certificate

active

08010935

ABSTRACT:
An electronic design automation (EDA) tool for and method of optimizing a placement of process monitors (PMs) in an integrated circuit (IC). In one embodiment, the EDA tool includes: (1) a critical path/cell identifier configured to identify critical paths and critical cells in the IC, (2) a candidate PM position identifier coupled to the critical path/cell identifier and configured to identify a set of candidate positions for the PMs, (3) a cluster generator coupled to the critical path/cell identifier and configured to associate the critical cells to form clusters thereof and (4) a PM placement optimizer coupled to the candidate PM position identifier and the cluster generator and configured to place a PM within each of the clusters by selecting among the candidate positions.

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