Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Patent
1997-07-31
1998-09-01
Everhart, Caridad
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
438598, 438599, 438618, H01L 2144
Patent
active
058010912
ABSTRACT:
The device has a semiconductor chip having active circuitry in the face thereof. The circuitry has busing over it containing two conductive layers having a plurality of contacts and vias with spacings between them that alternate with respect to one another to provide current ballasting and improved switching uniformity. The spacings between the alternating contacts and vias provide regions of maximum conductor thickness and therefore reduces the busing resistance. Staggering the rows of alternating contacts and vias provides further current ballasting. A first conducting layer is used to contact and provide electrically isolated low resistive conducting paths to the various semiconductor regions while the second conducting region is used to provide selective contact to the first conductive layer, thus providing a means of busing large currents over active semiconductor area without sacrificing performance parameters.
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patent: 3783349 (1974-01-01), Beasom
patent: 4859619 (1989-08-01), Wu et al.
patent: 5100812 (1992-03-01), Yamada et al.
patent: 5111276 (1992-05-01), Hingarh et al.
patent: 5665991 (1997-09-01), Efland et al.
Devore Joseph A.
Efland Taylor R.
Malhi Satwinder
Morton Alec J.
Smayling Michael C.
Brady III W. James
Donaldson Richard L.
Everhart Caridad
Texas Instruments Incorporated
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