Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2011-04-12

2011-04-12

Phung, Anh (Department: 2824)

Static information storage and retrieval

Systems using particular element

Flip-flop

C365S156000

Reexamination Certificate

active

07924605

ABSTRACT:
A semiconductor memory device includes a memory cell array. The memory cell array includes a plurality of sub arrays. Each sub array includes a plurality of memory cells. The memory cell includes a pair of storage nodes that are complementary to each other. One storage node constituting the pair of storage nodes in each of the memory cells in each of the sub arrays is connected to a global bit-line. The other storage node constituting the pair of storage nodes in each of the memory cells in each of the sub arrays is connected to a local bit-line. The global bit-line is a bit-line connected in common to the plurality of the sub arrays. The local bit-line is provided for each of the sub arrays.

REFERENCES:
patent: 6515887 (2003-02-01), Fujimoto
patent: 7123504 (2006-10-01), Yabe
patent: 7259977 (2007-08-01), Takeyama et al.
patent: 7385865 (2008-06-01), Khellah et al.

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