Method of embedding page address translation entries within a se

Details Method of embedding page address translation entries within a se Method of embedding page address translation entries within a se

1997-07-23

2000-05-16

Robertson, David L.

Electrical computers and digital processing systems: memory

Address formation

Address mapping

707100, 710 6, G06F 1200

Patent

active

060651040

ABSTRACT:
A data stream accessed in a sequential manner is stored in a plurality of pages in a main memory of a computer system. The pages are contiguous in virtual memory but not in physical memory. The page address translation entry needed to translate the virtual address of a next page into a physical address is embedded in the current page of the data stream. A peripheral processor coupled to the main memory by a bus accesses the data stream by reading the page address translation entry of the first page of the data stream, reading the page addressed by the physical address resulting from the page address translation entry, obtaining the next page address translation entry by extracting it from the current page without performing a read operation of the bus, and reading the next page addressed by the physical address resulting from the extracted page address translation entry.

REFERENCES:
patent: 5652854 (1997-07-01), Wong
patent: 5893162 (1999-04-01), Lau et al.
Tenebaum et al., Data Structures Using Pascal, 1981, pp. 166-168.

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