Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Patent
1996-08-29
2000-05-16
Bragdon, Reginald G.
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
711122, 711138, 711168, G06F 1208
Patent
active
060650974
ABSTRACT:
A computer system includes a central processing unit with an internal memory controller. The internal memory controller interacts with an external cache and a primary memory through a single unified memory bus. The internal memory controller generates a shared row address that is applied to the unified memory bus during an address fetching operation to simultaneously access a row in primary memory and an address in external cache. The internal memory controller may also generate a shared column address that is applied to the unified memory bus during a data return operation to simultaneously specify a column in primary memory and an address in external cache.
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Dignum Marcel
Feierbach Gary F.
Hayes Norman
Muhssin Saed
Sun Yanhua
Bragdon Reginald G.
Galliani William S.
Sun Microsystems Inc.
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