Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2011-06-28
2011-06-28
Alphonse, Fritz (Department: 2112)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C714S774000, C714S778000
Reexamination Certificate
active
07971130
ABSTRACT:
Embodiments of the present invention provide multi-level signal memory with LDPC and interleaving. Thus, various embodiments of the present invention provide a memory apparatus that includes a memory block comprising a plurality of memory cells, each memory cell adapted to operate with multi-level signals. Such a memory apparatus also includes a low density parity check (LDPC) coder to LDPC code data values to be written into the memory cells and an interleaver adapted to apply bit interleaved code modulation (BICM) to the LDPC coded data values to generate BICM coded data values. Other embodiments may be described and claimed.
REFERENCES:
patent: 6125050 (2000-09-01), Hofmann et al.
patent: 7373581 (2008-05-01), Okamura et al.
patent: 7421041 (2008-09-01), Khandekar et al.
patent: 7516390 (2009-04-01), Shen et al.
International Standard, Information technology—Telectommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications, ISO/IEC 8802-11:1999(E), ANSI/IEEE, Std 802.11, 1999 edition, 531 pages.
Supplemental to IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: High-speed Physical Layer in the 5 GHZ Band, IEEE Std 802.11a-1999, 91 pgs.
Supplemental to IEEE Standard for Information technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: Higher-Speed Physical Layer Extension in the 2.4 HGz Band, IEEE Std 802.11b-1999, 96 pgs.
IEEE Standard for Information technology—Telectommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: Amendment 2: Higher-Speed Physical Layer (PHY) extension in the 2.4 [continued on p. 2] HGz Band-Corrigendum 1, IEEE Std 802.11b-1999/Cor Jan. 2001, 23 pgs.
IEEE Standard for Information technology—Telectommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: Amendment 7: Medium Access Control (MAC) Quality of Service (QoS) Enhancements, IEEE 802.11e/D11.0, Oct. 2004, 195 pgs.
IEEE P802.11g/D8.2, Draft Supplement to Standard [for] Information Technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: Further Higher Data Rate Extension in the 2.4 GHz Band, Apr. 2003, 69 pgs.
Draft Supplement to Standard [for] Information Technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: Further Higher-Speed Physical Layer Extension in the 2.4 GHz Band, IEEE Std 802.11g/D2.8, May 2002, 53 pgs.
IEEE P802.11g/D8.2, Draft Supplement to Standard [for] Information Technology—Telecommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specification: Further Higher Data Rate Extension in the 2.4 GHz Band, Apr. 2003, 69 pgs.
802.11h, IEEE Standard for Information technology—Telectommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications, Amendment 5: Spectrum and Transmit Power Management Extensions in the 5 GHz band in Europe, IEEE Std 802.11h—2003, 75 pgs.
802.11h, IEEE Standard for Information technology—Telectommunications and information exchange between systems—Local and metropolitan area networks—Specific requirements, Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications, Amendment 6: Medium Access Control (MAC) Security Enhancements, IEEE Std 802.11i—2004, 190 pgs.
Draft Supplement to Standard for Information Technology—Telecommunications and Information Exchange Between Systems—LAN/MAN Specific Requirements—Part 11: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications: Specification for Enhanced Security, IEEE STD 802.11i/D3.0, Nov. 2002, 211 pgs.
IEEE P802.11, Wireless LANs, TGn Sync Proposal Technical Specification, May 18, 2005, IEEE 802.11-04/08898r6, 131 pgs.
Lou H-L et al: “Coded Modulation to Increase Storage Capacity of Multilevel Memories”, Proc. IEEE Globecom 1998, vol. vol 6, 1998, pp. 3379-3384, XP000805261.
Gregori S et al: “Construction of polyvalent error control codes for multilevel memories”, Proc. Intern. Conference on Electronics, Circuits and Systems, vol. 2, Dec. 17, 2000, pp. 751-754, XP010535817.
Rossi D et al: “Fast and compact error correcting scheme for reliable multilevel flash memories”, Proceedings of the Eighth IEEE International On-Line Testing Workshop, Jul. 8, 2002, pp. 221-225, XP010601444.
Zhang Zhi et al: “Low-density parity-check codes and high spectral efficiency modulation”, Proc. Personal, Indoor and Mobile Radio Communications Conference, Sep. 7, 2003, pp. 444-448, XP010681635.
Hsi-Chia Chang et al: “Multi-level memory systems using error control codes”, Proceedings of the 2004 International Symposium on Circuits and Systems, vol. 2, May 23, 2004, pp. 393-396, XP010720188.
Winstead C: “Analog Soft Decoding for Multi-Level Memories”, Proceedings 35th International Symposium on Multiple-Valued Logic, May 19, 2005, pp. 132-137, XP010798331.
Alphonse Fritz
Marvell International Ltd.
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