Strain-silicon CMOS using etch-stop layer and method of...

Details Strain-silicon CMOS using etch-stop layer and method of... Strain-silicon CMOS using etch-stop layer and method of...

2011-01-25

2011-01-25

Nhu, David (Department: 2895)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S270000, C438S197000, C257SE21576, C257SE21635, C257SE21663

Reexamination Certificate

active

07875543

ABSTRACT:
Recesses are formed in the drain and source regions of an MOS transistor. An ohmic contact layer is formed in the recesses, and a stressed silicon-nitride layer is formed over the ohmic contact layer. The recesses allow the stressed silicon nitride layer to provide strain in the plane of the channel region. In a particular embodiment, a tensile silicon nitride layer is formed over recesses of an NMOS transistor in a CMOS cell, and a compressive silicon nitride layer is formed over recesses of a PMOS transistor in the CMOS cell. In a particular embodiment the stressed silicon nitride layer(s) is a chemical etch stop layer.

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