Semiconductor device with through substrate vias

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

Reexamination Certificate

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C438S106000, C438S014000, C257SE21499, C257SE21506, C257SE21511, C257SE21521

Reexamination Certificate

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07998853

ABSTRACT:
Methods for making and testing a semiconductor device with through substrate vias are described. In some examples, a method of making a semiconductor device includes: forming through substrate vias (TSVs) in a substrate having an integrated circuit (IC) die, the substrate including an active side and a backside, the active side having conductive interconnect formed thereon, the TSVs including exposed portions on the backside of the substrate; patterning first metal on the active side of the substrate to electrically couple the TSVs to a portion of the conductive interconnect; and coupling the exposed portions of the TSVs on the backside of the substrate to electrically couple together the plurality of TSVs.

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patent: 2009/0283871 (2009-11-01), Chang et al.
patent: 2010/0127394 (2010-05-01), Ramiah et al.
Hsu, Howard, MEMS Solution for Semiconductor Probing, South-Western Testing Workshop Presentation, SCS Hightech, Inc., Jun. 6, 2005, 25 pp., available http://www.swtest.org/swtw—library/2005proc/PDF/S04—01—Hsu.pdf.
Mori, Ryuichiro, 3D-MEMS Probe for Fine Pitch Probing , R& D, Japan Electronic Materials Corp., IEEE SW Test Workshop, Jun. 3-6, 2007, 27 pp., available http://www.swtest.org/swtw—libray/2007proc/PDF/S05—03—Mori—SWTW2007.pdf.

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