Semiconductor device and method of manufacturing the same,...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S487000, C438S763000, C438S799000, C257SE21347

Reexamination Certificate

active

07910415

ABSTRACT:
A method of manufacturing a semiconductor device including a substrate; an insulating film formed thereon; a first semiconductor layer where strain is induced in the directions parallel to the surface of the substrate, the first semiconductor layer being on the insulating film; a source region and a drain region formed in the first semiconductor layer; and a gate layered body formed of a gate insulating film and a gate electrode on the first semiconductor layer is disclosed. The method includes the steps of (a) forming a second semiconductor layer by epitaxial growth on the first semiconductor layer; (b) heating the second semiconductor layer; and (c) removing the second semiconductor layer. The second semiconductor layer is different in lattice constant in an in-plane direction from the first semiconductor layer. Step (b) induces the strain in the first semiconductor layer by exposing the surface of the second semiconductor layer to energy lines.

REFERENCES:
patent: 6339232 (2002-01-01), Takagi
patent: 6972247 (2005-12-01), Bedell et al.
patent: 2004/0031979 (2004-02-01), Lochtefeld et al.
patent: 2004/0094763 (2004-05-01), Agnello et al.
patent: 2004/0108559 (2004-06-01), Sugii et al.
patent: 2004/0217393 (2004-11-01), Takizawa
patent: 2005/0032340 (2005-02-01), Takizawa
patent: 2006/0068557 (2006-03-01), Ochimizu et al.
patent: 2006/0134893 (2006-06-01), Savage et al.
patent: 9-219524 (1997-08-01), None
patent: 10-92947 (1998-04-01), None
patent: 10-209453 (1998-08-01), None
patent: 2001-160594 (2001-06-01), None
patent: 2001-257351 (2001-09-01), None
patent: 2004-128185 (2004-04-01), None
patent: 2004-281764 (2004-10-01), None
patent: 2005-045115 (2005-02-01), None
patent: 2005-50984 (2005-02-01), None
patent: WO 2005013375 (2005-02-01), None
A.R. Powell et al., “New approach to the growth of low dislocation relaxed SiGe material”, Appl. Phys. Lett. 64 (14), pp. 1856-1858 (1994).
S. Fukatsu et al., “SiGe-based semiconductor-on-insulator substrate created by low-energy separation-by-implanted-oxygen”, Appl. Phys. Lett. 72, pp. 3485 (1998).
T. Tezuka et al., “A novel Fabrication Technique of Ultrathin and Relaxed SiGe Buffer Layers with High Ge Fraction for Sub-100 nm Strained Silicon-on-Insulator MOSFETs”, Jpn. J. Appln. Phys. 40, pp. 2866 (2001).
K. Rim et al., “Fabrication and Mobility Characteristics of Ultra-thin Strained Si Directly on Insulator (SSDOI) MOSFETs”, IEEE IEDM Tech Dig., pp. 49 (2003).
C. Maleville et al., “Ultra-Thin SOI and Strained Silicon-on-Insulator (SSOI)- Fabrication, Metrology & Defects”, SEMI Standard Technical Education Program, SEMICON West 2003, San Francisco, Jul. 15, 2003, USA.
International Search Report of PCT/JP2005/008639 date of mailing Aug. 2, 2005.
International Search Report of PCT/JP2004/006447 date of mailing Jul. 13, 2004.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor device and method of manufacturing the same,... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device and method of manufacturing the same,..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device and method of manufacturing the same,... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2676992

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.