Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Analysis and verification
Reexamination Certificate
2011-07-05
2011-07-05
Doan, Nghia M (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Design of semiconductor mask or reticle
Analysis and verification
C716S050000, C716S052000, C716S053000, C716S054000, C716S055000, C430S005000, C430S030000
Reexamination Certificate
active
07975244
ABSTRACT:
A method is provided for designing a mask that includes the use of a pixel-based simulation of a lithographic process model, in which test structures are designed for determining numerical and discretization errors associated with the pixel grid as opposed to other model inaccuracies. The test structure has a plurality of rows of the same sequence of features, but each row is offset from other rows along an x-direction by a multiple of a minimum step size, such as used in modifying masks during optical proximity correction. The images for each row are simulated with a lithographic model that uses the selected pixel-grid size and the differences between row images are compared. If the differences between rows exceed or violate a predetermined criterion, the pixel grid size may be modified to minimize discretization and/or numerical errors due to the choice of pixel grid size.
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International Search Report dated Mar. 23, 2009.
Culp James A.
Mukherjee Maharaj
Rosenbluth Alan E.
Brown Katherine S.
Doan Nghia M
International Business Machines - Corporation
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