Multi-reader multi-writer circular buffer memory

Electrical computers and digital data processing systems: input/ – Input/output data processing – Input/output data buffering

Reexamination Certificate

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C710S001000, C710S003000, C710S056000, C711S110000, C711S149000, C711S150000

Reexamination Certificate

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07873763

ABSTRACT:
A system for managing a circular buffer memory includes a number of data writers, a number of data readers, a circular buffer memory; and logic configured to form a number of counters, form a number of temporary variables from the counters, and allow the data writers and the data readers to simultaneously access locations in the circular buffer memory determined by the temporary variables.

REFERENCES:
patent: 5553267 (1996-09-01), Herlihy
patent: 7246182 (2007-07-01), Forin et al.
patent: 2008/0010390 (2008-01-01), Abdelilah et al.
patent: 2009/0204755 (2009-08-01), Rushworth et al.
Co-pending U.S. Appl. No. 11/673,240, filed Feb. 9, 2007, Juqiang Liu et al., entitled “Multi-Reader Multi-Writer Circular Buffer Memory”.

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