Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2011-08-02
2011-08-02
Chery, Mardochee (Department: 2186)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C711S163000, C711SE12008
Reexamination Certificate
active
07991943
ABSTRACT:
System and method for implementing one time programmable (OTP) memory using embedded flash memory. A system-on-chip (SoC) includes a cleared flash memory array that includes an OTP block, including an OTP write inhibit field that is initially deasserted, a flash memory controller, and a controller. Data are written to the OTP block, including setting the OTP write inhibit field to signify prohibition of subsequent writes to the OTP block. The SoC is power cycled, and, in response, at least a portion of the OTP block is latched in a volatile memory, including asserting an OTP write inhibit bit based on the OTP write inhibit field, after which the OTP block is not writeable. In response to each subsequent power cycling, the controller is held in reset, the latching is performed, the controller is released from reset, and the flash array, now write protected, is configured to be controlled by the controller.
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Berenbaum Alan D.
Wahler Richard E.
Weiss Raphael
Chery Mardochee
Hood Jeffrey C.
Meyertons Hood Kivlin Kowert & Goetzel P.C.
Standard Microsystems Corporation
Williams Mark S.
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