Method and apparatus for reducing memory current leakage a...

Electrical computers and digital processing systems: support – Computer power control – Power conservation

Reexamination Certificate

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C713S300000, C713S310000, C713S321000, C713S322000, C713S323000, C713S324000, C713S330000, C713S340000

Reexamination Certificate

active

07930572

ABSTRACT:
A processing system includes a processor (20) having an idle mode node for generating an idle mode signal indicating whether the processor is in an idle mode and a memory (22) having a data retention node for receiving a data retention mode signal. The memory includes circuitry for placing the memory in a low power state responsive to the data retention mode signal. The idle mode signal drives the data retention node, such that the memory is placed in the low power state when the processor is in idle mode.

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Texas Instruments, TMS320C54x DSP Functional Overview, Literature No. SPRU307A, from “focus.ti.com/lit/ug/spru307a/spru307a.pdf”.

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