NAND memory device with inversion bit lines

Details NAND memory device with inversion bit lines NAND memory device with inversion bit lines

2011-07-19

2011-07-19

Fulk, Steven J (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE21681, C365S184000, C438S261000

Reexamination Certificate

active

07982262

ABSTRACT:
A NAND based memory device uses inversion bit lines in order to eliminate the need for implanted bit lines. As a result, the cell size can be reduced, which can provide greater densities in smaller packaging. In another aspect, a method for fabricating a NAND based memory device that uses inversion bit lines is disclosed.

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patent: 2006/0186455 (2006-08-01), Chen et al.
Yong-Sik Yim, et al., 70nm NAND Flash Technology with 0.025um2 Cell Size for 4Gb Flash Memory, 2003 IEEE.

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