Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2011-06-28
2011-06-28
Baderman, Scott T (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C702S132000
Reexamination Certificate
active
07971102
ABSTRACT:
Methods, apparatus, and products are disclosed for preemptive thermal management for a computing system based on cache performance, the computing system having a processor, cached computer memory operatively coupled to the processor, and a processor cache operatively coupled to the processor, the processor cache capable of storing a subset of memory contents of the cached computer memory, that include: attempting, by the processor, to retrieve portions of the memory contents of the cached computer memory from the processor cache, resulting in cache misses for the processor cache; tracking, by the processor, cache miss statistics for the processor cache in the computing system, the cache miss statistics describing the cache misses for the processor cache; and administering a thermal management device for the computing system in dependence upon the cache miss statistics, the thermal management device operatively coupled to the processor and capable of managing temperature for the computing system.
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Sung Woo Chung; Skadron, K.; , “Using On-Chip Event Counters for High-Resolution, Real-Time Temperature Measurement,” Thermal and Thermomechanical Phenomena in Electronics Systems, 2006. ITHERM '06. The Tenth Intersociety Conference on , vol., No., pp. 114-120, May 30-Jun. 2, 2006.
Purrington Challis L.
Scollard Michael L.
Stankevich Victor A.
Zapata Ivan R.
Baderman Scott T
Biggers & Ohanian LLP
International Business Machines - Corporation
Kennedy Brandon C.
Ko Chae
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